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authorPaul Kocialkowski <paul.kocialkowski@bootlin.com>2020-08-03 11:06:58 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2020-10-29 09:57:31 +0100
commit361a1b76b2d25b5c4064378070429c1be1c0c8fa (patch)
tree80f0d53d9e968ffacd50393348967aabc296ef27 /drivers/media
parent7052f4c5ab512cb88c85f952475d630eec2d8221 (diff)
media: ov5640: Correct Bit Div register in clock tree diagram
[ Upstream commit 4c85f628f6639e3e3e0a7788416154f28dfcae4f ] Although the code is correct and doing the right thing, the clock diagram showed the wrong register for the bit divider, which had me doubting the understanding of the tree. Fix this to avoid doubts in the future. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Fixes: aa2882481cada ("media: ov5640: Adjust the clock based on the expected rate") Acked-by: Jacopo Mondi <jacopo@jmondi.org> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'drivers/media')
-rw-r--r--drivers/media/i2c/ov5640.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/media/i2c/ov5640.c b/drivers/media/i2c/ov5640.c
index 266e947572c1..b21ddbd51446 100644
--- a/drivers/media/i2c/ov5640.c
+++ b/drivers/media/i2c/ov5640.c
@@ -740,7 +740,7 @@ static int ov5640_mod_reg(struct ov5640_dev *sensor, u16 reg,
* +->| PLL Root Div | - reg 0x3037, bit 4
* +-+------------+
* | +---------+
- * +->| Bit Div | - reg 0x3035, bits 0-3
+ * +->| Bit Div | - reg 0x3034, bits 0-3
* +-+-------+
* | +-------------+
* +->| SCLK Div | - reg 0x3108, bits 0-1