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author | Pavan Kunapuli <pkunapuli@nvidia.com> | 2011-01-27 02:32:28 -0800 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-04-26 15:50:13 -0700 |
commit | 843dc6983500fdfbbe5bb7b06c97fe57176597a1 (patch) | |
tree | e96f5ecea4a0103b953e0c7f3d8d75020a141ccc /drivers/mmc/host/sdhci-tegra.c | |
parent | f1b386ff3d8e4a329c636db08eb75b4e016a0649 (diff) |
sdhci-tegra:Enabling the SDMMC3_CLK_OVR_ON bit.
Enabling the SDMMC3_CLK_OVR_ON bit to make the
sdmmc3 internal clock stable.
Original-Change-Id: I76c8e966bf333c3638ddf029117734414578efcd
Reviewed-on: http://git-master/r/17184
Reviewed-by: Udaykumar Rameshchan Raval <uraval@nvidia.com>
Tested-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Change-Id: Idb6e083cdaa99e72566925e72ee1f0c8985d2308
Diffstat (limited to 'drivers/mmc/host/sdhci-tegra.c')
-rw-r--r-- | drivers/mmc/host/sdhci-tegra.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index abe31cf9ffb2..4e4ce5a5e532 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -188,7 +188,7 @@ static int __devinit tegra_sdhci_probe(struct platform_device *pdev) /* Fix ME: Enable the LVL2 CLK OVR bit */ ioaddr_clk_rst = ioremap(0x60006300, 0x400); val = readl(ioaddr_clk_rst + 0xa0); - val |= 0x40; + val |= 0x60; writel(val, ioaddr_clk_rst + 0xa0); sdhci = sdhci_alloc_host(&pdev->dev, sizeof(struct tegra_sdhci_host)); |