diff options
| author | Pavan Kunapuli <pkunapuli@nvidia.com> | 2011-02-21 18:43:23 +0530 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-04-26 15:52:03 -0700 |
| commit | f230e7096c251955df201fc96ba6b3d62560067f (patch) | |
| tree | 1cdb05f1230daf0a6f88139d70a04aca18960c79 /drivers/mmc/host/sdhci-tegra.c | |
| parent | 51be8f7300164201af58111556521ac8accb55e7 (diff) | |
sdhci: tegra:Support for tap delay configuration through board
Added interface to configure tap delays. This
is required for the frequency tuning algorithm.
Bug 661035
Original-Change-Id: I7e835ac53456e4c0cd7bb62b10d605d6da869764
Reviewed-on: http://git-master/r/20047
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Change-Id: Ide438d530aa6db22d8dbb5540c925d3a9ac9cfd7
Diffstat (limited to 'drivers/mmc/host/sdhci-tegra.c')
| -rw-r--r-- | drivers/mmc/host/sdhci-tegra.c | 22 |
1 files changed, 14 insertions, 8 deletions
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index a81c01f9448a..4071c7e9d74f 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -105,18 +105,15 @@ static int tegra_sdhci_enable_dma(struct sdhci_host *host) } #if defined (CONFIG_ARCH_TEGRA_3x_SOC) -static void tegra_sdhci_set_trimmer_values(struct sdhci_host *sdhci) +static void tegra_sdhci_configure_tap_value(struct sdhci_host *sdhci, unsigned int tap_delay) { u32 ctrl; - struct tegra_sdhci_host *host = sdhci_priv(sdhci); - BUG_ON(host->tap_delay > 0xFF); + BUG_ON(tap_delay > 0xFF); ctrl = sdhci_readl(sdhci, SDHCI_VENDOR_CLOCK_CNTRL); ctrl &= ~(0xFF << SDHCI_VENDOR_CLOCK_CNTRL_TAP_VAL_SHIFT); - ctrl |= (host->tap_delay << SDHCI_VENDOR_CLOCK_CNTRL_TAP_VAL_SHIFT); - ctrl &= ~(0xFF << SDHCI_VENDOR_CLOCK_CNTRL_BASE_CLK_FREQ_SHIFT); - ctrl |= ((host->max_clk/1000000) << SDHCI_VENDOR_CLOCK_CNTRL_BASE_CLK_FREQ_SHIFT); + ctrl |= (tap_delay << SDHCI_VENDOR_CLOCK_CNTRL_TAP_VAL_SHIFT); sdhci_writel(sdhci, ctrl, SDHCI_VENDOR_CLOCK_CNTRL); } #endif @@ -125,6 +122,7 @@ static void tegra_sdhci_configure_capabilities(struct sdhci_host *sdhci) { #if defined (CONFIG_ARCH_TEGRA_3x_SOC) u32 ctrl; + struct tegra_sdhci_host *host = sdhci_priv(sdhci); /* * Configure clock override bits and SDR50 tuning requirement in @@ -132,6 +130,8 @@ static void tegra_sdhci_configure_capabilities(struct sdhci_host *sdhci) */ ctrl = sdhci_readl(sdhci, SDHCI_VENDOR_CLOCK_CNTRL); ctrl |= SDHCI_VENDOR_CLOCK_CNTRL_PADPIPE_CLKEN_OVERRIDE; + ctrl &= ~(0xFF << SDHCI_VENDOR_CLOCK_CNTRL_BASE_CLK_FREQ_SHIFT); + ctrl |= ((host->max_clk/1000000) << SDHCI_VENDOR_CLOCK_CNTRL_BASE_CLK_FREQ_SHIFT); sdhci_writel(sdhci, ctrl, SDHCI_VENDOR_CLOCK_CNTRL); /* Enable support for SD 3.0 */ @@ -141,7 +141,7 @@ static void tegra_sdhci_configure_capabilities(struct sdhci_host *sdhci) ctrl |= SDMMC_VENDOR_MISC_CNTRL_SDMMC_SPARE0_ENABLE_SD3_0_SUPPORT; sdhci_writel(sdhci, ctrl, SDMMC_VENDOR_MISC_CNTRL); - tegra_sdhci_set_trimmer_values(sdhci); + tegra_sdhci_configure_tap_value(sdhci, host->tap_delay); #endif } @@ -198,8 +198,8 @@ static void tegra_sdhci_set_signalling_voltage(struct sdhci_host *sdhci, printk(KERN_ERR "%s switching to %dV failed %d\n", mmc_hostname(sdhci->mmc), (maxV/1000000), rc); else { - if (signalling_voltage == SDHCI_POWER_180) { #if CONFIG_ARCH_TEGRA_3x_SOC + if (signalling_voltage == MMC_1_8_VOLT_SIGNALLING) { /* Do Auto Calibration */ val = sdhci_readl(sdhci, SDMMC_AUTO_CAL_CONFIG); val |= SDMMC_AUTO_CAL_CONFIG_AUTO_CAL_ENABLE; @@ -222,6 +222,9 @@ static struct sdhci_ops tegra_sdhci_ops = { .set_clock = tegra_sdhci_set_clock, .configure_capabilities = tegra_sdhci_configure_capabilities, .get_cd = tegra_sdhci_card_detect, +#ifdef CONFIG_MMC_TEGRA_TAP_DELAY + .configure_tap_value = tegra_sdhci_configure_tap_value, +#endif }; static int __devinit tegra_sdhci_probe(struct platform_device *pdev) @@ -267,6 +270,9 @@ static int __devinit tegra_sdhci_probe(struct platform_device *pdev) host->cd_gpio_polarity = plat->cd_gpio_polarity; host->wp_gpio = plat->wp_gpio; host->wp_gpio_polarity = plat->wp_gpio_polarity; +#ifdef CONFIG_MMC_TEGRA_TAP_DELAY + host->sdhci->tap_value = plat->tap_delay; +#endif host->clk = clk_get(&pdev->dev, plat->clk_id); if (IS_ERR(host->clk)) { |