summaryrefslogtreecommitdiff
path: root/drivers/mtd/nand/pxa3xx_nand.c
diff options
context:
space:
mode:
authorEzequiel Garcia <ezequiel.garcia@free-electrons.com>2013-11-07 12:17:16 -0300
committerBrian Norris <computersforpeace@gmail.com>2014-01-03 11:22:11 -0800
commit2128b08c7c3aaf8b81fb76a0ce9ba37b5492f0db (patch)
treead3b4444ea1333942339b80bd70a386488fffce6 /drivers/mtd/nand/pxa3xx_nand.c
parent2d79ab16f592f07f21d666a86682684ab2d135f8 (diff)
mtd: nand: pxa3xx: Split FIFO size from to-be-read FIFO count
Introduce a fifo_size field to represent the size of the controller's FIFO buffer, and use it to distinguish that size from the amount of data bytes to be read from the FIFO. This is important to support devices with pages larger than the controller's internal FIFO, that need to read the pages in FIFO-sized chunks. In particular, the current code is at least confusing, for it mixes all the different sizes involved: FIFO size, page size and data size. This commit starts the cleaning by removing the info->page_size field that is not currently used. The host->page_size field should also be removed and use always mtd->writesize instead. Follow up commits will clean this up. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Diffstat (limited to 'drivers/mtd/nand/pxa3xx_nand.c')
-rw-r--r--drivers/mtd/nand/pxa3xx_nand.c12
1 files changed, 7 insertions, 5 deletions
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 5f0265de22bc..d6e96210c251 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -201,8 +201,8 @@ struct pxa3xx_nand_info {
int use_spare; /* use spare ? */
int is_ready;
- unsigned int page_size; /* page size of attached chip */
- unsigned int data_size; /* data size in FIFO */
+ unsigned int fifo_size; /* max. data size in the FIFO */
+ unsigned int data_size; /* data to be read from FIFO */
unsigned int oob_size;
int retcode;
@@ -303,16 +303,15 @@ static void pxa3xx_nand_set_timing(struct pxa3xx_nand_host *host,
static void pxa3xx_set_datasize(struct pxa3xx_nand_info *info)
{
- struct pxa3xx_nand_host *host = info->host[info->cs];
int oob_enable = info->reg_ndcr & NDCR_SPARE_EN;
- info->data_size = host->page_size;
+ info->data_size = info->fifo_size;
if (!oob_enable) {
info->oob_size = 0;
return;
}
- switch (host->page_size) {
+ switch (info->fifo_size) {
case 2048:
info->oob_size = (info->use_ecc) ? 40 : 64;
break;
@@ -929,9 +928,12 @@ static int pxa3xx_nand_detect_config(struct pxa3xx_nand_info *info)
uint32_t ndcr = nand_readl(info, NDCR);
if (ndcr & NDCR_PAGE_SZ) {
+ /* Controller's FIFO size */
+ info->fifo_size = 2048;
host->page_size = 2048;
host->read_id_bytes = 4;
} else {
+ info->fifo_size = 512;
host->page_size = 512;
host->read_id_bytes = 2;
}