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authorJohn Fastabend <john.r.fastabend@intel.com>2011-04-04 04:29:46 +0000
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2011-04-13 19:27:18 -0700
commit45a5f720fe37d21059da3c333c373c845ccbd82b (patch)
treef7701604f21cdf1e235d0a1bb6aa7a90190b0b48 /drivers/net/ixgbe/ixgbe_type.h
parente09ad236fc85b1d6e010138f59aba76f6c9a295b (diff)
ixgbe: DCB, X540 devices do not respond to pause frames
DCB enabled X540 devices are not responding to pause frames due to a missing register set that was added for these devices that did not exist in other devices. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ixgbe/ixgbe_type.h')
-rw-r--r--drivers/net/ixgbe/ixgbe_type.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/ixgbe/ixgbe_type.h b/drivers/net/ixgbe/ixgbe_type.h
index 7d0b37d2ab7b..f5bec9754c00 100644
--- a/drivers/net/ixgbe/ixgbe_type.h
+++ b/drivers/net/ixgbe/ixgbe_type.h
@@ -1728,6 +1728,8 @@
#define IXGBE_MFLCN_RPFCE 0x00000004 /* Receive Priority FC Enable */
#define IXGBE_MFLCN_RFCE 0x00000008 /* Receive FC Enable */
+#define IXGBE_MFLCN_RPFCE_SHIFT 4
+
/* Multiple Receive Queue Control */
#define IXGBE_MRQC_RSSEN 0x00000001 /* RSS Enable */
#define IXGBE_MRQC_MRQE_MASK 0xF /* Bits 3:0 */