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authorRichard Zhu <Richard.Zhu@freescale.com>2015-11-02 11:41:02 +0800
committerNitin Garg <nitin.garg@nxp.com>2016-01-14 11:02:21 -0600
commit3ec379099d10fd589bb7715d20d8ba53d001cbdd (patch)
tree28ab6937bf675936b3b8c3066672d25f424219b0 /drivers/pci
parent2c8c39a1358002ade2332c16955791ad21333e0f (diff)
MLK-11803 pci: imx: imx6qp pcie ep self-test failed
imx pcie used the wrab mode to do the cached access methods on axi bus. There is 64bytes address mis-aligned problem. Disable the cached operations. Signed-off-by: Richard Zhu <Richard.Zhu@freescale.com> (cherry picked from commit 85db70336ab66136481926bcd7f5abe599e2aa4f)
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/host/pci-imx6.c6
1 files changed, 1 insertions, 5 deletions
diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
index 55036760aae9..ae47b6f06b9a 100644
--- a/drivers/pci/host/pci-imx6.c
+++ b/drivers/pci/host/pci-imx6.c
@@ -1288,11 +1288,7 @@ static int __init imx6_pcie_probe(struct platform_device *pdev)
* reserved ddr memory after write the ddr_test_region
* content to rc.
*/
- if (is_imx7d_pcie(imx6_pcie))
- pcie_arb_base_addr = ioremap_nocache(pp->mem_base,
- test_region_size);
- else
- pcie_arb_base_addr = ioremap_cache(pp->mem_base,
+ pcie_arb_base_addr = ioremap_nocache(pp->mem_base,
test_region_size);
if (!pcie_arb_base_addr) {