diff options
author | Laxman Dewangan <ldewangan@nvidia.com> | 2013-11-25 15:17:29 +0530 |
---|---|---|
committer | Laxman Dewangan <ldewangan@nvidia.com> | 2013-11-28 01:23:45 -0800 |
commit | ace6cd0b38dbdaca9d8100b19a71b002e030aee5 (patch) | |
tree | 23716975f2a30334333fae3f2218d8be0b11cc1b /drivers/pinctrl/pinctrl-tegra124.c | |
parent | 0fd2d2de921efe741f98d5b5fce69ab2332eeb0a (diff) |
pinctrl: tegra: add safe pinmux function option
Add "safe" as the valid pinmux option from the DT.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Change-Id: Ic09de7b2f521df45c5d00d7267689d36c1c8479a
Reviewed-on: http://git-master/r/335020
GVS: Gerrit_Virtual_Submit
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Diffstat (limited to 'drivers/pinctrl/pinctrl-tegra124.c')
-rw-r--r-- | drivers/pinctrl/pinctrl-tegra124.c | 196 |
1 files changed, 196 insertions, 0 deletions
diff --git a/drivers/pinctrl/pinctrl-tegra124.c b/drivers/pinctrl/pinctrl-tegra124.c index 9cedd0b9c7ba..9b99bab21eef 100644 --- a/drivers/pinctrl/pinctrl-tegra124.c +++ b/drivers/pinctrl/pinctrl-tegra124.c @@ -1500,6 +1500,7 @@ static const unsigned drive_ao4_pins[] = { }; enum tegra_mux_dt { + TEGRA_MUX_DT_SAFE, TEGRA_MUX_DT_BLINK, TEGRA_MUX_DT_CEC, TEGRA_MUX_DT_CLDVFS, @@ -2694,6 +2695,200 @@ static const char * const tmds_groups[] = { "ph2", }; +static const char * const safe_groups[] = { + "ulpi_data0_po1", + "ulpi_data1_po2", + "ulpi_data2_po3", + "ulpi_data3_po4", + "ulpi_data4_po5", + "ulpi_data5_po6", + "ulpi_data6_po7", + "ulpi_data7_po0", + "ulpi_clk_py0", + "ulpi_dir_py1", + "ulpi_nxt_py2", + "ulpi_stp_py3", + "dap3_fs_pp0", + "dap3_din_pp1", + "dap3_dout_pp2", + "dap3_sclk_pp3", + "pv0", + "pv1", + "sdmmc1_clk_pz0", + "sdmmc1_cmd_pz1", + "sdmmc1_dat3_py4", + "sdmmc1_dat2_py5", + "sdmmc1_dat1_py6", + "sdmmc1_dat0_py7", + "clk2_out_pw5", + "clk2_req_pcc5", + "hdmi_int_pn7", + "ddc_scl_pv4", + "ddc_sda_pv5", + "uart2_rxd_pc3", + "uart2_txd_pc2", + "uart2_rts_n_pj6", + "uart2_cts_n_pj5", + "uart3_txd_pw6", + "uart3_rxd_pw7", + "uart3_cts_n_pa1", + "uart3_rts_n_pc0", + "pu0", + "pu1", + "pu2", + "pu3", + "pu4", + "pu5", + "pu6", + "gen1_i2c_scl_pc4", + "gen1_i2c_sda_pc5", + "dap4_fs_pp4", + "dap4_din_pp5", + "dap4_dout_pp6", + "dap4_sclk_pp7", + "clk3_out_pee0", + "clk3_req_pee1", + "pc7", + "pi5", + "pi7", + "pk0", + "pk1", + "pj0", + "pj2", + "pk3", + "pk4", + "pk2", + "pi3", + "pi6", + "pg0", + "pg1", + "pg2", + "pg3", + "pg4", + "pg5", + "pg6", + "pg7", + "ph0", + "ph1", + "ph2", + "ph3", + "ph4", + "ph5", + "ph6", + "ph7", + "pj7", + "pb0", + "pb1", + "pk7", + "pi0", + "pi1", + "pi2", + "pi4", + "gen2_i2c_scl_pt5", + "gen2_i2c_sda_pt6", + "sdmmc4_clk_pcc4", + "sdmmc4_cmd_pt7", + "sdmmc4_dat0_paa0", + "sdmmc4_dat1_paa1", + "sdmmc4_dat2_paa2", + "sdmmc4_dat3_paa3", + "sdmmc4_dat4_paa4", + "sdmmc4_dat5_paa5", + "sdmmc4_dat6_paa6", + "sdmmc4_dat7_paa7", + "cam_mclk_pcc0", + "pcc1", + "pbb0", + "cam_i2c_scl_pbb1", + "cam_i2c_sda_pbb2", + "pbb3", + "pbb4", + "pbb5", + "pbb6", + "pbb7", + "pcc2", + "jtag_rtck", + "pwr_i2c_scl_pz6", + "pwr_i2c_sda_pz7", + "kb_row0_pr0", + "kb_row1_pr1", + "kb_row2_pr2", + "kb_row3_pr3", + "kb_row4_pr4", + "kb_row5_pr5", + "kb_row6_pr6", + "kb_row7_pr7", + "kb_row8_ps0", + "kb_row9_ps1", + "kb_row10_ps2", + "kb_row11_ps3", + "kb_row12_ps4", + "kb_row13_ps5", + "kb_row14_ps6", + "kb_row15_ps7", + "kb_col0_pq0", + "kb_col1_pq1", + "kb_col2_pq2", + "kb_col3_pq3", + "kb_col4_pq4", + "kb_col5_pq5", + "kb_col6_pq6", + "kb_col7_pq7", + "clk_32k_out_pa0", + "core_pwr_req", + "cpu_pwr_req", + "pwr_int_n", + "clk_32k_in", + "owr", + "dap1_fs_pn0", + "dap1_din_pn1", + "dap1_dout_pn2", + "dap1_sclk_pn3", + "dap_mclk1_req_pee2", + "dap_mclk1_pw4", + "spdif_in_pk6", + "spdif_out_pk5", + "dap2_fs_pa2", + "dap2_din_pa4", + "dap2_dout_pa5", + "dap2_sclk_pa3", + "dvfs_pwm_px0", + "gpio_x1_aud_px1", + "gpio_x3_aud_px3", + "dvfs_clk_px2", + "gpio_x4_aud_px4", + "gpio_x5_aud_px5", + "gpio_x6_aud_px6", + "gpio_x7_aud_px7", + "sdmmc3_clk_pa6", + "sdmmc3_cmd_pa7", + "sdmmc3_dat0_pb7", + "sdmmc3_dat1_pb6", + "sdmmc3_dat2_pb5", + "sdmmc3_dat3_pb4", + "pex_l0_rst_n_pdd1", + "pex_l0_clkreq_n_pdd2", + "pex_wake_n_pdd3", + "pex_l1_rst_n_pdd5", + "pex_l1_clkreq_n_pdd6", + "hdmi_cec_pee3", + "sdmmc1_wp_n_pv3", + "sdmmc3_cd_n_pv2", + "gpio_w2_aud_pw2", + "gpio_w3_aud_pw3", + "usb_vbus_en0_pn4", + "usb_vbus_en1_pn5", + "sdmmc3_clk_lb_out_pee4", + "sdmmc3_clk_lb_in_pee5", + "gmi_clk_lb", + "reset_out_n", + "kb_row16_pt0", + "kb_row17_pt1", + "usb_vbus_en2_pff1", + "pff2", + "dp_hpd_pff0", +}; + #define FUNCTION(fname) \ { \ .name = #fname, \ @@ -2702,6 +2897,7 @@ static const char * const tmds_groups[] = { } static const struct tegra_function tegra124_functions[] = { + FUNCTION(safe), FUNCTION(blink), FUNCTION(cec), FUNCTION(cldvfs), |