diff options
author | Jay Cheng <jacheng@nvidia.com> | 2014-05-16 17:13:10 -0400 |
---|---|---|
committer | Riham Haidar <rhaidar@nvidia.com> | 2014-06-12 17:33:25 -0700 |
commit | 7bd24037512399b542a735aa45c7ded89143cc86 (patch) | |
tree | 5b04bfddf3542ebe22307a71c906559591fb9af7 /drivers/platform | |
parent | 978e7e53c9b82d78026b69fd18475d7d9dcb7a17 (diff) |
arm: tegra: pm: add delay between writes to IO_DPD_REQ
SW should explicity add delay between writes to IO_DPD_REQ and
IO_DPD2_REQ registers. This is because we use the same state machine
for both the registers.
The time between writes should be apb clk * (SEL_DPD_TIM + 5).
The worse case of apb clk is 32Khz,
SEL_DPD_TIM is configured as 0x10.
delay = (1/32000) * (16 + 5) which approximately 700us.
Bug 200002717
Change-Id: Icf4efdbc38ccdaca30a9d86da488ac796b657b36
Signed-off-by: Jay Cheng <jacheng@nvidia.com>
Reviewed-on: http://git-master/r/411065
(cherry picked from commit ebba7445ff9a32af6bb1759ac70311f66e2986cb)
Reviewed-on: http://git-master/r/412826
Reviewed-on: http://git-master/r/418379
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>
Diffstat (limited to 'drivers/platform')
-rw-r--r-- | drivers/platform/tegra/pmc.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/platform/tegra/pmc.c b/drivers/platform/tegra/pmc.c index 1b7e6983031a..af8576ae91b9 100644 --- a/drivers/platform/tegra/pmc.c +++ b/drivers/platform/tegra/pmc.c @@ -18,6 +18,7 @@ #include <linux/kernel.h> #include <linux/clk.h> #include <linux/io.h> +#include <linux/delay.h> #include <linux/of.h> #include <linux/of_address.h> #include <linux/export.h> @@ -227,7 +228,13 @@ EXPORT_SYMBOL(tegra_pmc_clear_dpd_sample); void tegra_pmc_remove_dpd_req() { tegra_pmc_writel(0x400fffff, PMC_IO_DPD_REQ); + tegra_pmc_readl(PMC_IO_DPD_REQ); /* unblock posted write */ + /* delay apb_clk * (SEL_DPD_TIM*5) */ + udelay(700); + tegra_pmc_writel(0x40001fff, PMC_IO_DPD2_REQ); + tegra_pmc_readl(PMC_IO_DPD2_REQ); /* unblock posted write */ + udelay(700); } EXPORT_SYMBOL(tegra_pmc_remove_dpd_req); |