diff options
| author | Joy Wang <joyw@nvidia.com> | 2014-01-13 13:42:57 +0800 |
|---|---|---|
| committer | Bharat Nihalani <bnihalani@nvidia.com> | 2014-02-18 01:53:38 -0800 |
| commit | fcc7f6236be1b425d3ab316851f4f9e100f09a04 (patch) | |
| tree | f3083a9d44ceb81ad3e7676314ca204fb916426b /drivers/platform | |
| parent | 98b4e60c6a6eb854cd22a77273e29d33d691b55a (diff) | |
xhci: tegra: Add flexibility to enable ports
Let xusb can own ports with any combination.
Bug 1345723
Change-Id: I6532a44150bea1113ebee1483263158fb3c04117
Signed-off-by: Joy Wang <joyw@nvidia.com>
Reviewed-on: http://git-master/r/354888
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Diffstat (limited to 'drivers/platform')
| -rw-r--r-- | drivers/platform/tegra/tegra_usb_pad_ctrl.c | 38 |
1 files changed, 13 insertions, 25 deletions
diff --git a/drivers/platform/tegra/tegra_usb_pad_ctrl.c b/drivers/platform/tegra/tegra_usb_pad_ctrl.c index 34ac67c448fc..e9cc08d58374 100644 --- a/drivers/platform/tegra/tegra_usb_pad_ctrl.c +++ b/drivers/platform/tegra/tegra_usb_pad_ctrl.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -142,15 +142,11 @@ void tegra_xhci_ss_wake_signal(u32 portmap, bool enable) /* Assert/Deassert clamp_en_early signals to SSP0/1 */ elpg_program0 = readl(pad_base + XUSB_PADCTL_ELPG_PROGRAM_0); if (enable) { - if (portmap & TEGRA_XUSB_SS_P0) - elpg_program0 |= SSP0_ELPG_CLAMP_EN_EARLY; - if (portmap & TEGRA_XUSB_SS_P1) - elpg_program0 |= SSP1_ELPG_CLAMP_EN_EARLY; + elpg_program0 |= SSP0_ELPG_CLAMP_EN_EARLY; + elpg_program0 |= SSP1_ELPG_CLAMP_EN_EARLY; } else { - if (portmap & TEGRA_XUSB_SS_P0) - elpg_program0 &= ~SSP0_ELPG_CLAMP_EN_EARLY; - if (portmap & TEGRA_XUSB_SS_P1) - elpg_program0 &= ~SSP1_ELPG_CLAMP_EN_EARLY; + elpg_program0 &= ~SSP0_ELPG_CLAMP_EN_EARLY; + elpg_program0 &= ~SSP1_ELPG_CLAMP_EN_EARLY; } writel(elpg_program0, pad_base + XUSB_PADCTL_ELPG_PROGRAM_0); @@ -164,15 +160,11 @@ void tegra_xhci_ss_wake_signal(u32 portmap, bool enable) elpg_program0 = readl(pad_base + XUSB_PADCTL_ELPG_PROGRAM_0); if (enable) { - if (portmap & TEGRA_XUSB_SS_P0) - elpg_program0 |= SSP0_ELPG_CLAMP_EN; - if (portmap & TEGRA_XUSB_SS_P1) - elpg_program0 |= SSP1_ELPG_CLAMP_EN; + elpg_program0 |= SSP0_ELPG_CLAMP_EN; + elpg_program0 |= SSP1_ELPG_CLAMP_EN; } else { - if (portmap & TEGRA_XUSB_SS_P0) - elpg_program0 &= ~SSP0_ELPG_CLAMP_EN; - if (portmap & TEGRA_XUSB_SS_P1) - elpg_program0 &= ~SSP1_ELPG_CLAMP_EN; + elpg_program0 &= ~SSP0_ELPG_CLAMP_EN; + elpg_program0 &= ~SSP1_ELPG_CLAMP_EN; } writel(elpg_program0, pad_base + XUSB_PADCTL_ELPG_PROGRAM_0); @@ -195,15 +187,11 @@ void tegra_xhci_ss_vcore(u32 portmap, bool enable) elpg_program0 = readl(pad_base + XUSB_PADCTL_ELPG_PROGRAM_0); if (enable) { - if (portmap & TEGRA_XUSB_SS_P0) - elpg_program0 |= SSP0_ELPG_VCORE_DOWN; - if (portmap & TEGRA_XUSB_SS_P1) - elpg_program0 |= SSP1_ELPG_VCORE_DOWN; + elpg_program0 |= SSP0_ELPG_VCORE_DOWN; + elpg_program0 |= SSP1_ELPG_VCORE_DOWN; } else { - if (portmap & TEGRA_XUSB_SS_P0) - elpg_program0 &= ~SSP0_ELPG_VCORE_DOWN; - if (portmap & TEGRA_XUSB_SS_P1) - elpg_program0 &= ~SSP1_ELPG_VCORE_DOWN; + elpg_program0 &= ~SSP0_ELPG_VCORE_DOWN; + elpg_program0 &= ~SSP1_ELPG_VCORE_DOWN; } writel(elpg_program0, pad_base + XUSB_PADCTL_ELPG_PROGRAM_0); spin_unlock_irqrestore(&xusb_padctl_lock, flags); |