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authorClaudiu Beznea <claudiu.beznea@microchip.com>2020-01-17 13:36:46 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2020-04-24 07:59:11 +0200
commit29eb4e18eb1976517b5ae07ff74ca3e4e2237f9f (patch)
tree5997b4b2934de3e1b73958e123feb9c6d61ecd6d /drivers/power/supply/bq27xxx_battery.c
parent462cd23758889d2908ff1ef1eca3cd3fd7ac9b33 (diff)
clk: at91: usb: continue if clk_hw_round_rate() return zero
[ Upstream commit b0ecf1c6c6e82da4847900fad0272abfd014666d ] clk_hw_round_rate() may call round rate function of its parents. In case of SAM9X60 two of USB parrents are PLLA and UPLL. These clocks are controlled by clk-sam9x60-pll.c driver. The round rate function for this driver is sam9x60_pll_round_rate() which call in turn sam9x60_pll_get_best_div_mul(). In case the requested rate is not in the proper range (rate < characteristics->output[0].min && rate > characteristics->output[0].max) the sam9x60_pll_round_rate() will return a negative number to its caller (called by clk_core_round_rate_nolock()). clk_hw_round_rate() will return zero in case a negative number is returned by clk_core_round_rate_nolock(). With this, the USB clock will continue its rate computation even caller of clk_hw_round_rate() returned an error. With this, the USB clock on SAM9X60 may not chose the best parent. I detected this after a suspend/resume cycle on SAM9X60. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lkml.kernel.org/r/1579261009-4573-2-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'drivers/power/supply/bq27xxx_battery.c')
0 files changed, 0 insertions, 0 deletions