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authorMartin Fuzzey <mfuzzey@gmail.com>2009-11-06 21:21:27 +0100
committerJohn W. Linville <linville@tuxdriver.com>2009-11-10 16:21:12 -0500
commitd8e235227899474976302cf272e5c2b756eb32de (patch)
tree861c0958d9e5f587524d00d0c3bdd05fcf14e161 /drivers/ssb
parent2606289779cb297320a185db5997729d29b6700b (diff)
ssb-pcmcia: Fix 32bit register access in early bus scanning
The scan function was using 32 bit access which does not work on 16bit CF cards. This patch corrects this by doing two 16 bit reads like ssb_pcmcia_read32 already does. mb -- Removed locking. That early in init there's no need for locking. Signed-off-by: Martin Fuzzey <mfuzzey@gmail.com> Signed-off-by: Michael Buesch <mb@bu3sch.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/ssb')
-rw-r--r--drivers/ssb/scan.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/ssb/scan.c b/drivers/ssb/scan.c
index b74212d698c7..e8b89e8ac9bd 100644
--- a/drivers/ssb/scan.c
+++ b/drivers/ssb/scan.c
@@ -162,6 +162,8 @@ static u8 chipid_to_nrcores(u16 chipid)
static u32 scan_read32(struct ssb_bus *bus, u8 current_coreidx,
u16 offset)
{
+ u32 lo, hi;
+
switch (bus->bustype) {
case SSB_BUSTYPE_SSB:
offset += current_coreidx * SSB_CORE_SIZE;
@@ -174,7 +176,9 @@ static u32 scan_read32(struct ssb_bus *bus, u8 current_coreidx,
offset -= 0x800;
} else
ssb_pcmcia_switch_segment(bus, 0);
- break;
+ lo = readw(bus->mmio + offset);
+ hi = readw(bus->mmio + offset + 2);
+ return lo | (hi << 16);
case SSB_BUSTYPE_SDIO:
offset += current_coreidx * SSB_CORE_SIZE;
return ssb_sdio_scan_read32(bus, offset);