diff options
author | Ian Abbott <abbotti@mev.co.uk> | 2016-05-20 14:49:17 +0100 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2016-06-17 20:59:52 -0700 |
commit | dde90d89ae5a98a3f1420b6c20c7f58dd95ccfa3 (patch) | |
tree | 7f1101a5733fdad57cdd1fc5f4a4878aba72d368 /drivers/staging/comedi/drivers/plx9080.h | |
parent | 65bf53de830063520cfbdedd56d80f1125d62271 (diff) |
staging: comedi: drivers: re-do PLX PCI 9080 DMADPRx register values
Replace the existing macros in "plx9080.h" that define values for the
DMADPR0 and DMADPR1 registers. (A little-endian version of the register
value is also placed in the `next` member of `struct plx_dma_desc`.)
Use the prefix `PLX_DMADPR_` for the macros. Make use of the `BIT(x)`
and `GENMASK(h,l)` macros to define the values.
Signed-off-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/comedi/drivers/plx9080.h')
-rw-r--r-- | drivers/staging/comedi/drivers/plx9080.h | 17 |
1 files changed, 10 insertions, 7 deletions
diff --git a/drivers/staging/comedi/drivers/plx9080.h b/drivers/staging/comedi/drivers/plx9080.h index 99c075c8d174..2fe1a4dc5330 100644 --- a/drivers/staging/comedi/drivers/plx9080.h +++ b/drivers/staging/comedi/drivers/plx9080.h @@ -513,13 +513,16 @@ struct plx_dma_desc { #define PLX_REG_DMADPR0 0x0090 #define PLX_REG_DMADPR1 0x00a4 -/* descriptor is located in pci space (not local space) */ -#define PLX_DESC_IN_PCI_BIT 0x1 -#define PLX_END_OF_CHAIN_BIT 0x2 /* end of chain bit */ -/* interrupt when this descriptor's transfer is finished */ -#define PLX_INTR_TERM_COUNT 0x4 -/* transfer from local to pci bus (not pci to local) */ -#define PLX_XFER_LOCAL_TO_PCI 0x8 +/* Descriptor Located In PCI Address Space (not local address space) */ +#define PLX_DMADPR_DESCPCI BIT(0) +/* End Of Chain */ +#define PLX_DMADPR_CHAINEND BIT(1) +/* Interrupt After Terminal Count */ +#define PLX_DMADPR_TCINTR BIT(2) +/* Direction Of Transfer Local Bus To PCI (not PCI to local) */ +#define PLX_DMADPR_XFERL2P BIT(3) +/* Next Descriptor Address Bits 31:4 (16 byte boundary) */ +#define PLX_DMADPR_NEXT_MASK GENMASK(31, 4) /* DMA Channel N Command/Status Register (N <= 1) (8-bit) */ #define PLX_REG_DMACSR(n) ((n) ? PLX_REG_DMACSR1 : PLX_REG_DMACSR0) |