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authorIan Abbott <abbotti@mev.co.uk>2011-05-16 12:05:54 +0100
committerGreg Kroah-Hartman <gregkh@suse.de>2011-05-17 13:33:39 -0700
commitcfe3cffd8e44c0b69c9c50a1659acbd32ac19b70 (patch)
tree884ef0918214aa78b14f66ab1b82839c6ee90bd1 /drivers/staging/comedi
parentc5cbebf87f49dfb4f4ccdf86f6c24b4912a3061f (diff)
staging: comedi: adv_pci_dio: Add a counter subdevice to PCI-1751
The Advantech PCI-1751 has a 8254 counter chip on board. Add it to the device as a counter subdevice. Apparently the counter can generate interrupts although the driver does not currently use this capability. Original patch by Ivan Russkih (Иван Русских) <vanekrus at gmail dot com>. Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging/comedi')
-rw-r--r--drivers/staging/comedi/drivers/adv_pci_dio.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/staging/comedi/drivers/adv_pci_dio.c b/drivers/staging/comedi/drivers/adv_pci_dio.c
index 9102667ab40e..d23799be7ce2 100644
--- a/drivers/staging/comedi/drivers/adv_pci_dio.c
+++ b/drivers/staging/comedi/drivers/adv_pci_dio.c
@@ -117,6 +117,7 @@ enum hw_io_access {
/* Advantech PCI-1751/3/3E */
#define PCI1751_DIO 0 /* R/W: begin of 8255 registers block */
+#define PCI1751_CNT 24 /* R/W: begin of 8254 registers block */
#define PCI1751_ICR 32 /* W: Interrupt control register */
#define PCI1751_ISR 32 /* R: Interrupt status register */
#define PCI1753_DIO 0 /* R/W: begin of 8255 registers block */
@@ -329,7 +330,7 @@ static const struct dio_boardtype boardtypes[] = {
{ {0, 0, 0, 0}, {0, 0, 0, 0} },
{ {48, PCI1751_DIO, 2, 0}, {0, 0, 0, 0} },
{0, 0, 0, 0},
- { {0, 0, 0, 0} },
+ { {3, PCI1751_CNT, 1, 0} },
IO_8b},
{"pci1752", PCI_VENDOR_ID_ADVANTECH, 0x1752, PCIDIO_MAINREG,
TYPE_PCI1752,