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authorLarry Finger <Larry.Finger@lwfinger.net>2010-08-20 10:15:30 -0500
committerLarry Finger <Larry.Finger@lwfinger.net>2010-08-20 10:15:30 -0500
commit2865d42c78a9121caad52cb02d1fbb7f5cdbc4ef (patch)
tree430b79f753b0e1cec6379b9a4208a716c914ac65 /drivers/staging/rtl8712/rtl8712_fifoctrl_regdef.h
parent763008c4357b73c8d18396dfd8d79dc58fa3f99d (diff)
staging: r8712u: Add the new driver to the mainline kernel
This code is for a completely new version of the Realtek 8192 USB devices such as the D-Link DWA-130. The Realtek code, which was originally for Linux, Windows XP and Windows CE, has been stripped of all code not needed for Linux. In addition, only one additional configuration variable, which enables AP mode, remains. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: Florian Schilhabel <florian.c.schilhabel@googlemail.com> Tested-by: Frederic Leroy <fredo@starox.org>
Diffstat (limited to 'drivers/staging/rtl8712/rtl8712_fifoctrl_regdef.h')
-rw-r--r--drivers/staging/rtl8712/rtl8712_fifoctrl_regdef.h57
1 files changed, 57 insertions, 0 deletions
diff --git a/drivers/staging/rtl8712/rtl8712_fifoctrl_regdef.h b/drivers/staging/rtl8712/rtl8712_fifoctrl_regdef.h
new file mode 100644
index 000000000000..c2e3af2c79f6
--- /dev/null
+++ b/drivers/staging/rtl8712/rtl8712_fifoctrl_regdef.h
@@ -0,0 +1,57 @@
+#ifndef __RTL8712_FIFOCTRL_REGDEF_H__
+#define __RTL8712_FIFOCTRL_REGDEF_H__
+
+#define RQPN (RTL8712_FIFOCTRL_ + 0x00)
+#define RXFF_BNDY (RTL8712_FIFOCTRL_ + 0x0C)
+#define RXRPT_BNDY (RTL8712_FIFOCTRL_ + 0x10)
+#define TXPKTBUF_PGBNDY (RTL8712_FIFOCTRL_ + 0x14)
+#define PBP (RTL8712_FIFOCTRL_ + 0x15)
+#define RX_DRVINFO_SZ (RTL8712_FIFOCTRL_ + 0x16)
+#define TXFF_STATUS (RTL8712_FIFOCTRL_ + 0x17)
+#define RXFF_STATUS (RTL8712_FIFOCTRL_ + 0x18)
+#define TXFF_EMPTY_TH (RTL8712_FIFOCTRL_ + 0x19)
+#define SDIO_RX_BLKSZ (RTL8712_FIFOCTRL_ + 0x1C)
+#define RXDMA_RXCTRL (RTL8712_FIFOCTRL_ + 0x1D)
+#define RXPKT_NUM (RTL8712_FIFOCTRL_ + 0x1E)
+#define RXPKT_NUM_C2H (RTL8712_FIFOCTRL_ + 0x1F)
+#define C2HCMD_UDT_SIZE (RTL8712_FIFOCTRL_ + 0x20)
+#define C2HCMD_UDT_ADDR (RTL8712_FIFOCTRL_ + 0x22)
+#define FIFOPAGE2 (RTL8712_FIFOCTRL_ + 0x24)
+#define FIFOPAGE1 (RTL8712_FIFOCTRL_ + 0x28)
+#define FW_RSVD_PG_CTRL (RTL8712_FIFOCTRL_ + 0x30)
+#define TXRPTFF_RDPTR (RTL8712_FIFOCTRL_ + 0x40)
+#define TXRPTFF_WTPTR (RTL8712_FIFOCTRL_ + 0x44)
+#define C2HFF_RDPTR (RTL8712_FIFOCTRL_ + 0x48)
+#define C2HFF_WTPTR (RTL8712_FIFOCTRL_ + 0x4C)
+#define RXFF0_RDPTR (RTL8712_FIFOCTRL_ + 0x50)
+#define RXFF0_WTPTR (RTL8712_FIFOCTRL_ + 0x54)
+#define RXFF1_RDPTR (RTL8712_FIFOCTRL_ + 0x58)
+#define RXFF1_WTPTR (RTL8712_FIFOCTRL_ + 0x5C)
+#define RXRPT0FF_RDPTR (RTL8712_FIFOCTRL_ + 0x60)
+#define RXRPT0FF_WTPTR (RTL8712_FIFOCTRL_ + 0x64)
+#define RXRPT1FF_RDPTR (RTL8712_FIFOCTRL_ + 0x68)
+#define RXRPT1FF_WTPTR (RTL8712_FIFOCTRL_ + 0x6C)
+#define RX0PKTNUM (RTL8712_FIFOCTRL_ + 0x72)
+#define RX1PKTNUM (RTL8712_FIFOCTRL_ + 0x74)
+#define RXFLTMAP0 (RTL8712_FIFOCTRL_ + 0x76)
+#define RXFLTMAP1 (RTL8712_FIFOCTRL_ + 0x78)
+#define RXFLTMAP2 (RTL8712_FIFOCTRL_ + 0x7A)
+#define RXFLTMAP3 (RTL8712_FIFOCTRL_ + 0x7c)
+#define TBDA (RTL8712_FIFOCTRL_ + 0x84)
+#define THPDA (RTL8712_FIFOCTRL_ + 0x88)
+#define TCDA (RTL8712_FIFOCTRL_ + 0x8C)
+#define TMDA (RTL8712_FIFOCTRL_ + 0x90)
+#define HDA (RTL8712_FIFOCTRL_ + 0x94)
+#define TVODA (RTL8712_FIFOCTRL_ + 0x98)
+#define TVIDA (RTL8712_FIFOCTRL_ + 0x9C)
+#define TBEDA (RTL8712_FIFOCTRL_ + 0xA0)
+#define TBKDA (RTL8712_FIFOCTRL_ + 0xA4)
+#define RCDA (RTL8712_FIFOCTRL_ + 0xA8)
+#define RDSA (RTL8712_FIFOCTRL_ + 0xAC)
+#define TXPKT_NUM_CTRL (RTL8712_FIFOCTRL_ + 0xB0)
+#define TXQ_PGADD (RTL8712_FIFOCTRL_ + 0xB3)
+#define TXFF_PG_NUM (RTL8712_FIFOCTRL_ + 0xB4)
+
+
+
+#endif /* __RTL8712_FIFOCTRL_REGDEF_H__ */