diff options
| author | Fugang Duan <b38611@freescale.com> | 2015-03-04 15:26:59 +0800 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:21:52 +0800 |
| commit | 3c83c7e2068a84eb57511e88f2e987763eece26a (patch) | |
| tree | f3315d1c1d7dc342da3d514fd7d01e9708b19401 /drivers/tty/serial/imx.c | |
| parent | b77ab5bd4db6013ee70b7bdc0fcebcd9f530b852 (diff) | |
MLK-10367 tty: serial: imx: set uart module clock to 80Mhz
When UART module clock is great than 80Mhz, there may have risk after
confirming with IC owner. So set the maximum module clock to 80Mhz.
Signed-off-by: Fugang Duan <B38611@freescale.com>
(cherry picked from commit: 330a1245cb91583d9bc916bbb6d8c7d2c86b26f3)
Diffstat (limited to 'drivers/tty/serial/imx.c')
| -rw-r--r-- | drivers/tty/serial/imx.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c index 4e827e5a52a3..b1b004029501 100644 --- a/drivers/tty/serial/imx.c +++ b/drivers/tty/serial/imx.c @@ -185,6 +185,7 @@ #define DRIVER_NAME "IMX-uart" #define UART_NR 8 +#define IMX_MODULE_MAX_CLK_RATE 80000000 /* i.MX21 type uart runs on all i.mx except i.MX1 and i.MX6q */ enum imx_uart_type { @@ -2146,6 +2147,9 @@ static int serial_imx_probe(struct platform_device *pdev) } sport->port.uartclk = clk_get_rate(sport->clk_per); + if (sport->port.uartclk > IMX_MODULE_MAX_CLK_RATE) + clk_set_rate(sport->clk_per, IMX_MODULE_MAX_CLK_RATE); + sport->port.uartclk = clk_get_rate(sport->clk_per); /* For register access, we only need to enable the ipg clock. */ ret = clk_prepare_enable(sport->clk_ipg); |