diff options
| author | Fugang Duan <b38611@freescale.com> | 2015-01-19 17:16:35 +0800 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@freescale.com> | 2015-09-17 09:21:10 -0500 |
| commit | 9746ade3c3e95e87301b5bed84abd829ead9aac7 (patch) | |
| tree | 2d958837fb5b899b776800fb282cf8b9abe07118 /drivers/tty | |
| parent | 12c2f5a268c744b6bcef1549212de2c39b0d6edb (diff) | |
MLK-10116 tty: serial: imx: fix flush buffer issue when module clock is at 4Mhz
In general, uart module clock require it is great than 80Mhz to match 5Mbps
baud rate. When test below 14Mhz module clock, software reset cause state
machines off normal. And for i.MX6SL evk board low power test, it set uart
module clock to 4Mhz, which cause console port print out messy code.
The patch just is workaround to fix console issue.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Diffstat (limited to 'drivers/tty')
| -rw-r--r-- | drivers/tty/serial/imx.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c index 313f0b39011b..3a760be41740 100644 --- a/drivers/tty/serial/imx.c +++ b/drivers/tty/serial/imx.c @@ -1388,6 +1388,10 @@ static void imx_flush_buffer(struct uart_port *port) dmaengine_terminate_all(sport->dma_chan_tx); } + /* For console port, it is not necessary flush buffer and reset FIFO */ + if (uart_console(port)) + return; + /* * UCR2_SRST will reset the transmit and receive state machines, * all FIFOs and register UBIR, UBMR, UBRC, |