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authorShengzhou Liu <Shengzhou.Liu@freescale.com>2012-02-02 11:23:14 +0800
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2012-02-02 12:46:36 -0800
commit529febeee680dc22416fca033151a5e8bc620447 (patch)
tree6ea05e6734be0b1699c5e96f6eba1912fd801a94 /drivers/usb/host/ehci-fsl.h
parented2833ac7ee86ee00f6dd3085a32752209fd8b6e (diff)
powerpc/usb: fix issue of CPU halt when missing USB PHY clock
when missing USB PHY clock, kernel booting up will halt during USB initialization. We should check USBGP[PHY_CLK_VALID] bit to avoid CPU hang in this case. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/usb/host/ehci-fsl.h')
-rw-r--r--drivers/usb/host/ehci-fsl.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h
index 491806221165..bdf43e2adc51 100644
--- a/drivers/usb/host/ehci-fsl.h
+++ b/drivers/usb/host/ehci-fsl.h
@@ -45,5 +45,6 @@
#define FSL_SOC_USB_PRICTRL 0x40c /* NOTE: big-endian */
#define FSL_SOC_USB_SICTRL 0x410 /* NOTE: big-endian */
#define FSL_SOC_USB_CTRL 0x500 /* NOTE: big-endian */
+#define CTRL_PHY_CLK_VALID (1 << 17)
#define SNOOP_SIZE_2GB 0x1e
#endif /* _EHCI_FSL_H */