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authorAnatolij Gustschin <agust@denx.de>2012-01-24 22:17:38 +0100
committerGreg Kroah-Hartman <gregkh@suse.de>2012-01-24 15:04:01 -0800
commit761bbcb74e4611414937ea480ba60bb970648755 (patch)
tree36d2c1ef203e68ef6b9b344cabca6b0595388286 /drivers/usb/host/ehci-fsl.h
parent820c629a595ad8d8f2694641e494738b18d29e7b (diff)
usb: ehci-fsl: set INCR8 mode for system bus interface on MPC512x
Use INCR8 mode for system bus interface of the USB controller on MPC512x. This is a work-around for the AHB bus lock up problem observed on MPC512x when there is heavy simultaneous PATA write or network (FEC) activity. See also "12.4 The USB controller can issue transactions that lock up the AHB bus under certain conditions" in MPC5121e (M36P) Errata. Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Matthias Fuchs <matthias.fuchs@esd.ue> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/host/ehci-fsl.h')
-rw-r--r--drivers/usb/host/ehci-fsl.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h
index 491806221165..0855be8b5b47 100644
--- a/drivers/usb/host/ehci-fsl.h
+++ b/drivers/usb/host/ehci-fsl.h
@@ -19,6 +19,8 @@
#define _EHCI_FSL_H
/* offsets for the non-ehci registers in the FSL SOC USB controller */
+#define FSL_SOC_USB_SBUSCFG 0x90
+#define SBUSCFG_INCR8 0x02 /* INCR8, specified */
#define FSL_SOC_USB_ULPIVP 0x170
#define FSL_SOC_USB_PORTSC1 0x184
#define PORT_PTS_MSK (3<<30)