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authorAndrija Bosnjakovic <abosnjakovic@nvidia.com>2012-02-13 18:41:26 -0800
committerLokesh Pathak <lpathak@nvidia.com>2012-02-21 09:12:00 -0800
commitb3c72246b83e346dd14bbebca6d96b07aae990e8 (patch)
treedba735c9659405fd317d6181906a9ddd044664eb /drivers/video/tegra/dc/dc.c
parent713a1581efdb741559b18e2f00cbe53dda0f5b97 (diff)
video: tegra: dc: use side-by-side stereo HDMI mode
Add a config option to limit HDMI stereo 3D output to 74.25MHz pixel clock. When this option is set, substitute the frame pack stereo modes for side-by-side (half) left-right stereo modes to meet this pixel clock restriction. By default, do not use it (use frame packed HDMI mode as usual). Bug 938807 Change-Id: I2ce2ca72cbb15ac1939af0f3386dd23650262435 Reviewed-on: http://git-master/r/84252 Reviewed-by: Andrija Bosnjakovic <abosnjakovic@nvidia.com> Tested-by: Andrija Bosnjakovic <abosnjakovic@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Diffstat (limited to 'drivers/video/tegra/dc/dc.c')
-rw-r--r--drivers/video/tegra/dc/dc.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/video/tegra/dc/dc.c b/drivers/video/tegra/dc/dc.c
index 0756430..e64b935 100644
--- a/drivers/video/tegra/dc/dc.c
+++ b/drivers/video/tegra/dc/dc.c
@@ -1755,6 +1755,8 @@ int tegra_dc_set_fb_mode(struct tegra_dc *dc,
mode.h_ref_to_sync, mode.v_ref_to_sync
);
+#ifndef CONFIG_TEGRA_HDMI_74MHZ_LIMIT
+ /* Double the pixel clock and update v_active only for frame packed mode */
if (mode.stereo_mode) {
mode.pclk *= 2;
/* total v_active = yres*2 + activespace */
@@ -1763,6 +1765,7 @@ int tegra_dc_set_fb_mode(struct tegra_dc *dc,
fbmode->upper_margin +
fbmode->lower_margin;
}
+#endif
mode.flags = 0;