diff options
| author | Kevin Huang <kevinh@nvidia.com> | 2011-09-15 11:57:19 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:49:58 -0800 |
| commit | 4dc2cbe2d93f3346d313ca497907018fbb54c414 (patch) | |
| tree | fa76855a7b8cb7cee14df5871b7824a4a2cb23c1 /drivers/video/tegra/dc/dsi.c | |
| parent | 43ab4185e9e5c5b27a25bda26be5ccd24c5e6069 (diff) | |
video: tegra: dc: Use FRAME_END_INT to mark completion of frame end.
V_BLANK_INT was used to mark frame end for other tasks. However, it occurs
at frame start. Switch to FRAME_END_INT to mark the end of frame.
Bug 875448
Reviewed-on: http://git-master/r/52694
(cherry picked from commit 078a2688c67c46cf840f191405cd4324cb9c4574)
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
[jmayo@nvidia.com: wrapped commit message, fixed bug in S_TO_MS()]
Change-Id: I507148772c2f3037befd30289e5b3a56fe417ee9
Reviewed-on: http://git-master/r/63369
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Tested-by: Jon Mayo <jmayo@nvidia.com>
Rebase-Id: R5dbcf2d7ff3fd627194ae1a6163a300e6e48ff7c
Diffstat (limited to 'drivers/video/tegra/dc/dsi.c')
| -rw-r--r-- | drivers/video/tegra/dc/dsi.c | 19 |
1 files changed, 10 insertions, 9 deletions
diff --git a/drivers/video/tegra/dc/dsi.c b/drivers/video/tegra/dc/dsi.c index b2318f43cebb..2c2cb78d3488 100644 --- a/drivers/video/tegra/dc/dsi.c +++ b/drivers/video/tegra/dc/dsi.c @@ -38,8 +38,7 @@ #include "dsi.h" #define DSI_USE_SYNC_POINTS 1 - -#define DSI_STOP_DC_DURATION_MSEC 1000 +#define S_TO_MS(x) (1000 * (x)) #define DSI_MODULE_NOT_INIT 0x0 #define DSI_MODULE_INIT 0x1 @@ -843,26 +842,28 @@ void tegra_dsi_stop_dc_stream_at_frame_end(struct tegra_dc *dc, { int val; long timeout; + u32 frame_period = DIV_ROUND_UP(S_TO_MS(1), dsi->info.refresh_rate); /* stop dc */ tegra_dsi_stop_dc_stream(dc, dsi); - /* enable vblank interrupt */ + /* enable frame end interrupt */ val = tegra_dc_readl(dc, DC_CMD_INT_ENABLE); - val |= V_BLANK_INT; + val |= FRAME_END_INT; tegra_dc_writel(dc, val, DC_CMD_INT_ENABLE); val = tegra_dc_readl(dc, DC_CMD_INT_MASK); - val |= V_BLANK_INT; + val |= FRAME_END_INT; tegra_dc_writel(dc, val, DC_CMD_INT_MASK); - /* wait for vblank completion */ + /* wait for frame_end completion */ timeout = wait_for_completion_interruptible_timeout( - &dc->vblank_complete, DSI_STOP_DC_DURATION_MSEC); + &dc->frame_end_complete, + msecs_to_jiffies(frame_period)); - /* disable vblank interrupt */ + /* disable frame end interrupt */ val = tegra_dc_readl(dc, DC_CMD_INT_ENABLE); - val &= ~V_BLANK_INT; + val &= ~FRAME_END_INT; tegra_dc_writel(dc, val, DC_CMD_INT_ENABLE); if (timeout == 0) |