diff options
| author | Erik Gilling <konkers@android.com> | 2010-07-11 17:06:28 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:35:02 -0800 |
| commit | 7dc7d25e524e79700261534d084033e26ed94eeb (patch) | |
| tree | 416905957f45754c9d006ddf315fae77b2c533f0 /drivers/video/tegra/dc/rgb.c | |
| parent | c9b27df803a98d6f9a2d535ee2fb53dbec116ea7 (diff) | |
video: tegra: add tegra display controller driver
Notable ommisions:
* support for anything but lvds panels
* inegration with nvhost driver to sync updates with 3D
* FB physical geometry is not set
* lacks interface to set overlay/window x,y offset
v2 changes:
* suspend/resume support
* move code into drivers/video/tegra/dc
* modularize output support
* clean register dumping, add debugfs register file
* code review feedback
* make the display controller register the framebuffer devices
Signed-off-by: Erik Gilling <konkers@android.com>
Diffstat (limited to 'drivers/video/tegra/dc/rgb.c')
| -rw-r--r-- | drivers/video/tegra/dc/rgb.c | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/drivers/video/tegra/dc/rgb.c b/drivers/video/tegra/dc/rgb.c new file mode 100644 index 000000000000..de1a8fabd25e --- /dev/null +++ b/drivers/video/tegra/dc/rgb.c @@ -0,0 +1,63 @@ +/* + * drivers/video/tegra/dc/rgb.c + * + * Copyright (C) 2010 Google, Inc. + * Author: Erik Gilling <konkers@android.com> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/kernel.h> + +#include <mach/dc.h> + +#include "dc_reg.h" +#include "dc_priv.h" + + +static const u32 tegra_dc_rgb_pintable[] = { + DC_COM_PIN_OUTPUT_ENABLE0, 0x00000000, + DC_COM_PIN_OUTPUT_ENABLE1, 0x00000000, + DC_COM_PIN_OUTPUT_ENABLE2, 0x00000000, + DC_COM_PIN_OUTPUT_ENABLE3, 0x00000000, + DC_COM_PIN_OUTPUT_POLARITY0, 0x00000000, + DC_COM_PIN_OUTPUT_POLARITY1, 0x01000000, + DC_COM_PIN_OUTPUT_POLARITY2, 0x00000000, + DC_COM_PIN_OUTPUT_POLARITY3, 0x00000000, + DC_COM_PIN_OUTPUT_DATA0, 0x00000000, + DC_COM_PIN_OUTPUT_DATA1, 0x00000000, + DC_COM_PIN_OUTPUT_DATA2, 0x00000000, + DC_COM_PIN_OUTPUT_DATA3, 0x00000000, + DC_COM_PIN_OUTPUT_SELECT0, 0x00000000, + DC_COM_PIN_OUTPUT_SELECT1, 0x00000000, + DC_COM_PIN_OUTPUT_SELECT2, 0x00000000, + DC_COM_PIN_OUTPUT_SELECT3, 0x00000000, + DC_COM_PIN_OUTPUT_SELECT4, 0x00210222, + DC_COM_PIN_OUTPUT_SELECT5, 0x00002200, + DC_COM_PIN_OUTPUT_SELECT6, 0x00020000, +}; + + +void tegra_dc_rgb_init(struct tegra_dc *dc) +{ + tegra_dc_writel(dc, PW0_ENABLE | PW1_ENABLE | PW2_ENABLE | PW3_ENABLE | + PW4_ENABLE | PM0_ENABLE | PM1_ENABLE, + DC_CMD_DISPLAY_POWER_CONTROL); + + tegra_dc_writel(dc, DISP_CTRL_MODE_C_DISPLAY, DC_CMD_DISPLAY_COMMAND); + + tegra_dc_write_table(dc, tegra_dc_rgb_pintable); +} + +struct tegra_dc_out_ops tegra_dc_rgb_ops = { + .init = tegra_dc_rgb_init, +}; + |