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author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2012-11-16 17:13:59 +0100 |
---|---|---|
committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2012-11-16 17:13:59 +0100 |
commit | aef3564ff85a9ddf49eb7a1349dec04ec243970d (patch) | |
tree | 618e6e8483cf20d719617c763df5bda124114458 /drivers/video/tegra/dc/window.c | |
parent | 5a2c06a6918ae041a81c7f6caaf627b717324f2c (diff) |
android: dc: tegra: video: conditionally revert timestamp support
Android R14 userspace seems to have issues with timestamp support:
[ 14.764337] host1x host1x: SurfaceFlinger: syncpoint id 8 (disp0_a) stuck waiting 3, timeout=2147483447
[ 14.773845] host1x host1x: id 8 (disp0_a) min 2 max 4
[ 14.779163] host1x host1x: id 9 (disp1_a) min 2 max 4
[ 14.784316] host1x host1x: id 18 (2d_0) min 21 max 25
[ 14.789586] host1x host1x: id 20 (disp0_b) min 2 max 4
[ 14.794889] host1x host1x: id 21 (disp1_b) min 2 max 4
[ 14.800241] host1x host1x: id 22 (3d) min 77 max 95
[ 14.805217] host1x host1x: id 24 (disp0_c) min 2 max 4
[ 14.810573] host1x host1x: id 25 (disp1_c) min 2 max 4
[ 14.815873] host1x host1x: id 26 (vblank0) min 800 max 0
[ 14.821264] host1x host1x: id 27 (vblank1) min 684 max 0
[ 14.826810] host1x host1x: waitbase id 3 val 77
Therefore conditionally revert it in that case for now.
See e4e2e776a3d4bf1adf37fc061cfdfb92281f3ace.
Diffstat (limited to 'drivers/video/tegra/dc/window.c')
-rw-r--r-- | drivers/video/tegra/dc/window.c | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/drivers/video/tegra/dc/window.c b/drivers/video/tegra/dc/window.c index cd91fab428ed..af18564f45b9 100644 --- a/drivers/video/tegra/dc/window.c +++ b/drivers/video/tegra/dc/window.c @@ -24,7 +24,9 @@ #include "dc_priv.h" static int no_vsync; +#ifndef CONFIG_ANDROID static atomic_t frame_end_ref = ATOMIC_INIT(0); +#endif /* !CONFIG_ANDROID */ module_param_named(no_vsync, no_vsync, int, S_IRUGO | S_IWUSR); @@ -41,6 +43,7 @@ static bool tegra_dc_windows_are_clean(struct tegra_dc_win *windows[], return true; } +#ifndef CONFIG_ANDROID int tegra_dc_config_frame_end_intr(struct tegra_dc *dc, bool enable) { tegra_dc_writel(dc, FRAME_END_INT, DC_CMD_INT_STATUS); @@ -51,6 +54,7 @@ int tegra_dc_config_frame_end_intr(struct tegra_dc *dc, bool enable) tegra_dc_mask_interrupt(dc, FRAME_END_INT); return 0; } +#endif /* !CONFIG_ANDROID */ static int get_topmost_window(u32 *depths, unsigned long *wins) { @@ -418,9 +422,14 @@ int tegra_dc_update_windows(struct tegra_dc_win *windows[], int n) FRAME_END_INT | V_BLANK_INT | ALL_UF_INT); } else { clear_bit(V_BLANK_FLIP, &dc->vblank_ref_count); - tegra_dc_mask_interrupt(dc, V_BLANK_INT | ALL_UF_INT); + tegra_dc_mask_interrupt(dc, +#ifndef CONFIG_ANDROID + V_BLANK_INT | ALL_UF_INT); if (!atomic_read(&frame_end_ref)) tegra_dc_mask_interrupt(dc, FRAME_END_INT); +#else /* !CONFIG_ANDROID */ + FRAME_END_INT | V_BLANK_INT | ALL_UF_INT); +#endif /* !CONFIG_ANDROID */ } if (dc->out->flags & TEGRA_DC_OUT_ONE_SHOT_MODE) @@ -470,7 +479,11 @@ void tegra_dc_trigger_windows(struct tegra_dc *dc) if (!dirty) { if (!(dc->out->flags & TEGRA_DC_OUT_ONE_SHOT_MODE) +#ifndef CONFIG_ANDROID && !atomic_read(&frame_end_ref)) +#else /* !CONFIG_ANDROID */ + ) +#endif /* !CONFIG_ANDROID */ tegra_dc_mask_interrupt(dc, FRAME_END_INT); } |