diff options
author | Alex Frid <afrid@nvidia.com> | 2011-08-19 20:27:34 -0700 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:48:29 -0800 |
commit | 3b71489c1df3511477f4ddecdc45d71ab5250710 (patch) | |
tree | a963fa04a525176914d5048fcaec0b49467f2a00 /drivers/video/tegra/host/nvhost_acm.c | |
parent | a5ff909a500832b97d948975e003642199be26bf (diff) |
tegra: nvhost: Set minimum rate for nvhost clocks
Define minimum rate level for nvhost clocks that is applied to all
user space clients requests. Actually set minimum rate for EMC clock.
Bug 859515
Original-Change-Id: I85a7e835bacb11fd794cda6916e397e0f3cbd728
Reviewed-on: http://git-master/r/48325
Tested-by: Yu-Huan Hsu <yhsu@nvidia.com>
Tested-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Rebase-Id: R76a20140698529ed768b4aa0517628edb98a6cb9
Diffstat (limited to 'drivers/video/tegra/host/nvhost_acm.c')
-rw-r--r-- | drivers/video/tegra/host/nvhost_acm.c | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/drivers/video/tegra/host/nvhost_acm.c b/drivers/video/tegra/host/nvhost_acm.c index 9caaf4817257..caa49efbd61c 100644 --- a/drivers/video/tegra/host/nvhost_acm.c +++ b/drivers/video/tegra/host/nvhost_acm.c @@ -37,6 +37,8 @@ #define ACM_SUSPEND_WAIT_FOR_IDLE_TIMEOUT (2 * HZ) #define POWERGATE_DELAY 10 +#define HOST_EMC_FLOOR 300000000 + void nvhost_module_reset(struct nvhost_module *mod) { struct nvhost_master *dev; @@ -417,7 +419,7 @@ int nvhost_module_get_rate(struct nvhost_module *mod, unsigned long *rate, int nvhost_module_update_rate(struct nvhost_module *mod, int index) { - unsigned long rate = 0; + unsigned long rate = mod->min_rate[index]; struct nvhost_module_client *m; list_for_each_entry(m, &mod->client_list, node) { @@ -515,10 +517,18 @@ int nvhost_module_init(struct nvhost_module *mod, const char *name, INIT_LIST_HEAD(&mod->client_list); while (i < NVHOST_MODULE_MAX_CLOCKS) { long rate; - mod->clk[i] = clk_get(dev, get_module_clk_id(name, i)); + const char *clk_name = get_module_clk_id(name, i); + mod->min_rate[i] = 0; + mod->clk[i] = clk_get(dev, clk_name); if (IS_ERR_OR_NULL(mod->clk[i])) break; - if (strcmp(name, "gr2d") == 0 + + if (strcmp(clk_name, "emc") == 0 + && tegra_get_chipid() != TEGRA_CHIPID_TEGRA2) { + rate = clk_round_rate(mod->clk[i], HOST_EMC_FLOOR); + if (!IS_ERR_VALUE(rate)) + mod->min_rate[i] = rate; + } else if (strcmp(name, "gr2d") == 0 && tegra_get_chipid() != TEGRA_CHIPID_TEGRA2) rate = clk_round_rate(mod->clk[i], 0); else |