diff options
| author | Stefan Agner <stefan.agner@toradex.com> | 2013-11-25 18:33:12 +0100 |
|---|---|---|
| committer | Stefan Agner <stefan.agner@toradex.com> | 2013-11-25 18:33:12 +0100 |
| commit | c7c52865252fc2106134cc50ce4823ef78d7e10e (patch) | |
| tree | 6c367e58eb0e7a191bd9d1f6ad5c9755428017f0 /drivers/video/tegra | |
| parent | e514ae82078b5efc565f143bee1e31836a4142c5 (diff) | |
ahci-tegra: add avdd_plle regulator
When enabling SATA clocks, the PCIE clocks are enabled as well since
those are the parent clocks. In order to enable this parent clocks,
the PCIE regulator avdd_plle needs to be enabled. The resume path used
to freeze because the PCIE PLL did not lock.
Diffstat (limited to 'drivers/video/tegra')
0 files changed, 0 insertions, 0 deletions