diff options
| author | Robby Cai <robby.cai@nxp.com> | 2018-12-26 21:55:46 +0800 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:36:01 +0800 |
| commit | 92a7e53664802a729b647516d9e578fa5897aa63 (patch) | |
| tree | 4c6cc51c957e7fff27b48f2d2e41d54deaca7434 /drivers/video | |
| parent | fa685e574276be9765e730f522ea99887133cc42 (diff) | |
MLK-20231-2 video: epdc: restore QoS setting after resume
After suspend, the qos setting is lost. This patch restores it after resume.
Signed-off-by: Robby Cai <robby.cai@nxp.com>
Diffstat (limited to 'drivers/video')
| -rw-r--r-- | drivers/video/fbdev/mxc/mxc_epdc_v2_fb.c | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/drivers/video/fbdev/mxc/mxc_epdc_v2_fb.c b/drivers/video/fbdev/mxc/mxc_epdc_v2_fb.c index b908ad79689e..d3849c36509c 100644 --- a/drivers/video/fbdev/mxc/mxc_epdc_v2_fb.c +++ b/drivers/video/fbdev/mxc/mxc_epdc_v2_fb.c @@ -253,6 +253,9 @@ struct mxc_epdc_fb_data { struct regmap *gpr; u8 req_gpr; u8 req_bit; + + /* qos */ + struct regmap *qos_regmap; }; struct waveform_data_header { @@ -4998,6 +5001,11 @@ static int mxc_epdc_fb_probe(struct platform_device *pdev) } } + fb_data->qos_regmap = syscon_regmap_lookup_by_phandle(np, "qos"); + if (IS_ERR(fb_data->qos_regmap)) { + dev_warn(&pdev->dev, "No qos phandle specified. Ignored.\n"); + } + /* Get platform data and check validity */ fb_data->pdata = &epdc_data; if ((fb_data->pdata == NULL) || (fb_data->pdata->num_modes < 1) @@ -5711,12 +5719,47 @@ out: return ret; } +static void mxc_epdc_restore_qos(struct mxc_epdc_fb_data *data) +{ + if (IS_ERR_OR_NULL(data->qos_regmap)) { + dev_dbg(data->dev, "no QoS setting found.\n"); + return; + } + +#define QOS_EPDC_OFFSET 0x3400 +#define QOS_PXP0_OFFSET 0x2C00 +#define QOS_PXP1_OFFSET 0x3C00 + regmap_write(data->qos_regmap, 0, 0); + regmap_write(data->qos_regmap, 0x60, 0); + regmap_write(data->qos_regmap, QOS_EPDC_OFFSET, 0); + regmap_write(data->qos_regmap, QOS_PXP0_OFFSET, 0); + regmap_write(data->qos_regmap, QOS_PXP1_OFFSET, 0); + + regmap_write(data->qos_regmap, QOS_EPDC_OFFSET + 0xd0, 0x0f020722); + regmap_write(data->qos_regmap, QOS_EPDC_OFFSET + 0xe0, 0x0f020722); + + regmap_write(data->qos_regmap, QOS_PXP0_OFFSET, 1); + regmap_write(data->qos_regmap, QOS_PXP1_OFFSET, 1); + + regmap_write(data->qos_regmap, QOS_PXP0_OFFSET + 0x50, 0x0f020222); + regmap_write(data->qos_regmap, QOS_PXP1_OFFSET + 0x50, 0x0f020222); + regmap_write(data->qos_regmap, QOS_PXP0_OFFSET + 0x60, 0x0f020222); + regmap_write(data->qos_regmap, QOS_PXP1_OFFSET + 0x60, 0x0f020222); + regmap_write(data->qos_regmap, QOS_PXP0_OFFSET + 0x70, 0x0f020422); + regmap_write(data->qos_regmap, QOS_PXP1_OFFSET + 0x70, 0x0f020422); + + if (!IS_ERR_OR_NULL(data->gpr)) + regmap_update_bits(data->gpr, 0x34, 0xe080, 0xe080); +} + static int mxc_epdc_fb_resume(struct device *dev) { struct mxc_epdc_fb_data *data = dev_get_drvdata(dev); pinctrl_pm_select_default_state(dev); + mxc_epdc_restore_qos(data); + mxc_epdc_fb_blank(FB_BLANK_UNBLANK, &data->info); epdc_init_settings(data); data->updates_active = false; |