diff options
| author | Kevin Huang <kevinh@nvidia.com> | 2012-01-17 16:28:55 -0800 |
|---|---|---|
| committer | Varun Colbert <vcolbert@nvidia.com> | 2012-01-30 11:47:29 -0800 |
| commit | 36d271bed03255ec821d7c2ffef405e61289ea0e (patch) | |
| tree | a4fe1d6e3f6540f9289a1a2771e11fd753770649 /drivers/video | |
| parent | 13485d291aed28875f935afe89b70cd5056b861a (diff) | |
video: tegra: dsi: Refine the DSI clock calculation.
Reviewed-on: http://git-master/r/76406
Change-Id: I6e5b37a88d6be4ba2cc81417fe3eadfd129bc899
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77306
Reviewed-by: Automatic_Commit_Validation_User
Diffstat (limited to 'drivers/video')
| -rw-r--r-- | drivers/video/tegra/dc/dc.c | 3 | ||||
| -rw-r--r-- | drivers/video/tegra/dc/dc_priv.h | 1 | ||||
| -rw-r--r-- | drivers/video/tegra/dc/dsi.c | 18 |
3 files changed, 13 insertions, 9 deletions
diff --git a/drivers/video/tegra/dc/dc.c b/drivers/video/tegra/dc/dc.c index 45962baa9fce..bdd0a02e3356 100644 --- a/drivers/video/tegra/dc/dc.c +++ b/drivers/video/tegra/dc/dc.c @@ -1460,7 +1460,7 @@ void tegra_dc_setup_clk(struct tegra_dc *dc, struct clk *clk) } } - rate = dc->mode.pclk * 2; + rate = dc->mode.pclk * dc->shift_clk_div * 2; if (rate != clk_get_rate(base_clk)) clk_set_rate(base_clk, rate); @@ -2737,6 +2737,7 @@ static int tegra_dc_probe(struct nvhost_device *ndev) dc->clk = clk; dc->emc_clk = emc_clk; + dc->shift_clk_div = 1; dc->base_res = base_res; dc->base = base; diff --git a/drivers/video/tegra/dc/dc_priv.h b/drivers/video/tegra/dc/dc_priv.h index 2a01a8387c16..30b5ea996922 100644 --- a/drivers/video/tegra/dc/dc_priv.h +++ b/drivers/video/tegra/dc/dc_priv.h @@ -82,6 +82,7 @@ struct tegra_dc { struct clk *emc_clk; int emc_clk_rate; int new_emc_clk_rate; + u32 shift_clk_div; bool connected; bool enabled; diff --git a/drivers/video/tegra/dc/dsi.c b/drivers/video/tegra/dc/dsi.c index 82902756cc23..2c511efc4156 100644 --- a/drivers/video/tegra/dc/dsi.c +++ b/drivers/video/tegra/dc/dsi.c @@ -946,21 +946,23 @@ static void tegra_dsi_set_dsi_clk(struct tegra_dc *dc, { u32 rm; + /* Round up to MHz */ rm = clk % 1000; if (rm != 0) clk -= rm; - dc->mode.pclk = clk*1000; + /* Set up pixel clock */ + dc->shift_clk_div = dsi->shift_clk_div; + dc->mode.pclk = (clk * 1000) / dsi->shift_clk_div; + + /* Enable DSI clock */ tegra_dc_setup_clk(dc, dsi->dsi_clk); - if (dsi->clk_ref == true) - clk_disable(dsi->dsi_clk); - else + if (!dsi->clk_ref) { dsi->clk_ref = true; - clk_enable(dsi->dsi_clk); - tegra_periph_reset_deassert(dsi->dsi_clk); - + clk_enable(dsi->dsi_clk); + tegra_periph_reset_deassert(dsi->dsi_clk); + } dsi->current_dsi_clk_khz = clk_get_rate(dsi->dsi_clk) / 1000; - dsi->current_bit_clk_ns = 1000*1000 / (dsi->current_dsi_clk_khz * 2); } |