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authorLaxman Dewangan <ldewangan@nvidia.com>2013-01-27 15:34:09 +0530
committerDan Willemsen <dwillemsen@nvidia.com>2013-09-14 12:58:31 -0700
commit51fac969afb00ca5f96bbc9cfa3a5900925b2769 (patch)
treebd793a536fb9947c9c69b72256207af40c0a16be /drivers/watchdog
parentab58e91b93b9abae9cec4f1802cc60b83e5e4d78 (diff)
mfd: max77660: use MAX77660 name space for global config reg
Use the namespaced macro for MAX77660 global config registers. Accordingly changed the code. Change-Id: I75ab0fbad978359b22dcdc419dd5830460194732 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/194454
Diffstat (limited to 'drivers/watchdog')
-rw-r--r--drivers/watchdog/Kconfig4
-rw-r--r--drivers/watchdog/max77660_sys_wdt.c44
2 files changed, 21 insertions, 27 deletions
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 3aeefc9edeea..d53c2037fbcc 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -339,8 +339,8 @@ config MAX77660_SYSTEM_WATCHDOG
tristate "Maxim MAX77660 System Watchdog Timer"
depends on MFD_MAX77663
help
- Support for Maxim MAX77660 System watch dog timer. Say 'Y' here to enable the
- watchdog timer support for MAX77660 chips.
+ Support for Maxim MAX77660 System watch dog timer. Say 'Y' here
+ to enable the watchdog timer support for MAX77660 chips.
config STMP3XXX_RTC_WATCHDOG
tristate "Freescale STMP3XXX & i.MX23/28 watchdog"
diff --git a/drivers/watchdog/max77660_sys_wdt.c b/drivers/watchdog/max77660_sys_wdt.c
index 325018f59ef6..d6cb1ef246c1 100644
--- a/drivers/watchdog/max77660_sys_wdt.c
+++ b/drivers/watchdog/max77660_sys_wdt.c
@@ -1,7 +1,7 @@
/*
* max77660_sys_wdt.c -- MAX77660 System WatchDog Timer.
*
- * Watchdog timer for MAIXM MAX77660 PMIC.
+ * System watchdog timer for MAXIM MAX77660 PMIC.
*
* Copyright (c) 2013, NVIDIA Corporation.
*
@@ -38,17 +38,13 @@ static bool nowayout = WATCHDOG_NOWAYOUT;
struct max77660_sys_wdt {
struct watchdog_device wdt_dev;
- int irq;
- struct device *parent;
struct device *dev;
+ struct device *parent;
+ int irq;
};
static int max77660_twd_sys[] = {16, 32, 64, 128};
-#define MAX77660_TWD_SYS(i) ((i & 0x3) << 4)
-#define MAX77660_WDT_CHG_CLR 0x1
-#define MAX77660_WDTEN_SYS BIT(5)
-
static irqreturn_t max77660_sys_wdt_irq(int irq, void *data)
{
struct max77660_sys_wdt *wdt = data;
@@ -56,10 +52,10 @@ static irqreturn_t max77660_sys_wdt_irq(int irq, void *data)
/* Reset timer before any debug prints */
ret = max77660_reg_write(wdt->parent, MAX77660_PWR_SLAVE,
- MAX77660_REG_GLOBAL_CFG4, MAX77660_WDT_CHG_CLR);
+ MAX77660_REG_GLOBAL_CFG4,
+ MAX77660_GLBLCNFG4_WDTC_SYS_CLR);
if (ret < 0)
- dev_err(wdt->dev,
- "MAX77660_REG_GLOBAL_CFG6 update failed: %d\n", ret);
+ dev_err(wdt->dev, "GLOBAL_CFG4 update failed: %d\n", ret);
dev_info(wdt->dev, "System WDT interrupt occur\n");
return IRQ_HANDLED;
@@ -71,10 +67,9 @@ static int max77660_sys_wdt_start(struct watchdog_device *wdt_dev)
int ret;
ret = max77660_reg_set_bits(wdt->parent, MAX77660_PWR_SLAVE,
- MAX77660_REG_GLOBAL_CFG1, MAX77660_WDTEN_SYS);
+ MAX77660_REG_GLOBAL_CFG1, MAX77660_GLBLCNFG1_WDTEN_SYS);
if (ret < 0) {
- dev_err(wdt->dev,
- "MAX77660_REG_GLOBAL_CFG1 update failed: %d\n", ret);
+ dev_err(wdt->dev, "GLOBAL_CFG1 update failed: %d\n", ret);
return ret;
}
return 0;
@@ -86,10 +81,9 @@ static int max77660_sys_wdt_stop(struct watchdog_device *wdt_dev)
int ret;
ret = max77660_reg_clr_bits(wdt->parent, MAX77660_PWR_SLAVE,
- MAX77660_REG_GLOBAL_CFG1, MAX77660_WDTEN_SYS);
+ MAX77660_REG_GLOBAL_CFG1, MAX77660_GLBLCNFG1_WDTEN_SYS);
if (ret < 0) {
- dev_err(wdt->dev,
- "MAX77660_REG_GLOBAL_CFG1 update failed: %d\n", ret);
+ dev_err(wdt->dev, "GLOBAL_CFG1 update failed: %d\n", ret);
return ret;
}
return 0;
@@ -108,15 +102,16 @@ static int max77660_sys_wdt_set_timeout(struct watchdog_device *wdt_dev,
}
if (i == ARRAY_SIZE(max77660_twd_sys)) {
- dev_err(wdt->dev, " Not a valid timeout: %u\n", timeout);
+ dev_err(wdt->dev, "Not a valid timeout: %u\n", timeout);
return -EINVAL;
}
ret = max77660_reg_update(wdt->parent, MAX77660_PWR_SLAVE,
- MAX77660_REG_GLOBAL_CFG2, 0x30, MAX77660_TWD_SYS(i));
+ MAX77660_REG_GLOBAL_CFG2,
+ MAX77660_GLBLCNFG2_TWD_SYS_MASK,
+ MAX77660_GLBLCNFG2_TWD_SYS(i));
if (ret < 0) {
- dev_err(wdt->dev,
- "MAX77660_REG_GLOBAL_CFG2 update failed: %d\n", ret);
+ dev_err(wdt->dev, "GLOBAL_CFG2 update failed: %d\n", ret);
return ret;
}
return 0;
@@ -180,17 +175,15 @@ static int __devinit max77660_sys_wdt_probe(struct platform_device *pdev)
ret = max77660_reg_read(wdt->parent, MAX77660_PWR_SLAVE,
MAX77660_REG_GLOBAL_CFG1, &regval);
if (ret < 0) {
- dev_err(wdt->dev,
- "MAX77660_REG_GLOBAL_CFG1 read failed: %d\n", ret);
+ dev_err(wdt->dev, "GLOBAL_CFG1 read failed: %d\n", ret);
goto scrub;
}
- if (regval & MAX77660_WDTEN_SYS)
+ if (regval & MAX77660_GLBLCNFG1_WDTEN_SYS)
dev_info(wdt->dev, "System watchdog timer enabled\n");
else
dev_info(wdt->dev, "System watchdog timer disabled\n");
-
ret = max77660_sys_wdt_stop(wdt_dev);
if (ret < 0) {
dev_err(wdt->dev, "wdt stop failed: %d\n", ret);
@@ -222,8 +215,9 @@ static int __devexit max77660_sys_wdt_remove(struct platform_device *pdev)
{
struct max77660_sys_wdt *wdt = platform_get_drvdata(pdev);
- free_irq(wdt->irq, wdt);
+ max77660_sys_wdt_stop(&wdt->wdt_dev);
watchdog_unregister_device(&wdt->wdt_dev);
+ free_irq(wdt->irq, wdt);
return 0;
}