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authorStefan Agner <stefan.agner@toradex.com>2016-11-23 16:14:23 -0800
committerMarcel Ziswiler <marcel.ziswiler@toradex.com>2018-12-09 23:11:12 +0100
commit6c0549c5697f6edf02cb01d1f2ddff3a7031960b (patch)
treebcbb0fa493ba07c64fe553b04018ef4e83914a3a /drivers
parentbdbe4d90a550a09cfe3973fdbf0cbd1670c2e3a9 (diff)
gpio: mxc: clear interrupt mask/status optionally
Add a kernel parameter ("gpio-mxc.noclearirq") to disable unconditional interrupt mask/clearing. This is useful when a second CPU (the Cortex-M4) is accessing the same GPIO bank. Using the same GPIO bank from the Cortex-A7 and M4 sounds risky, but it seems to work quite well. Most registers are write only (e.g. interrupt status register can be cleared with a single write), which makes them safe for concurrent access. However, sharing a single GPIO bank between two cores does not allow to use the Resource Domain Controller. Hence for secure applications assigning a dedicated GPIO bank is still preferable. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> (cherry picked from commit 4cfa939c693b20ca213f054c1dfe5583d966beb4)
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpio/gpio-mxc.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c
index c1a1e00b8cb0..b7bc18b630ba 100644
--- a/drivers/gpio/gpio-mxc.c
+++ b/drivers/gpio/gpio-mxc.c
@@ -20,6 +20,7 @@
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*/
+#include <linux/moduleparam.h>
#include <linux/err.h>
#include <linux/init.h>
#include <linux/interrupt.h>
@@ -36,6 +37,10 @@
#include <linux/of_device.h>
#include <linux/bug.h>
+static bool noclearirq = false;
+module_param(noclearirq, bool, 0);
+MODULE_PARM_DESC(noclearirq, "do not clear IRQ mask/status on probe");
+
enum mxc_gpio_hwtype {
IMX1_GPIO, /* runs on i.mx1 */
IMX21_GPIO, /* runs on i.mx21 and i.mx27 */
@@ -429,8 +434,10 @@ static int mxc_gpio_probe(struct platform_device *pdev)
return port->irq;
/* disable the interrupt and clear the status */
- writel(0, port->base + GPIO_IMR);
- writel(~0, port->base + GPIO_ISR);
+ if (!noclearirq) {
+ writel(0, port->base + GPIO_IMR);
+ writel(~0, port->base + GPIO_ISR);
+ }
if (mxc_gpio_hwtype == IMX21_GPIO) {
/*