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authorDmitry Osipenko <digetx@gmail.com>2019-04-12 01:12:48 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2019-05-25 18:22:12 +0200
commitc82da3e43ce171bd5da4b698deced68c80c58bd6 (patch)
treef59976997de3fc334ffded38e54743232695905b /drivers
parentdda71c1663c808c72cb95d59cbd0989f767bd9d4 (diff)
memory: tegra: Fix integer overflow on tick value calculation
commit b906c056b6023c390f18347169071193fda57dde upstream. Multiplying the Memory Controller clock rate by the tick count results in an integer overflow and in result the truncated tick value is being programmed into hardware, such that the GR3D memory client performance is reduced by two times. Cc: stable <stable@vger.kernel.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/memory/tegra/mc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c
index 24afc36833bf..1608a482f681 100644
--- a/drivers/memory/tegra/mc.c
+++ b/drivers/memory/tegra/mc.c
@@ -280,7 +280,7 @@ static int tegra_mc_setup_latency_allowance(struct tegra_mc *mc)
u32 value;
/* compute the number of MC clock cycles per tick */
- tick = mc->tick * clk_get_rate(mc->clk);
+ tick = (unsigned long long)mc->tick * clk_get_rate(mc->clk);
do_div(tick, NSEC_PER_SEC);
value = readl(mc->regs + MC_EMEM_ARB_CFG);