diff options
author | Christian Hemp <c.hemp@phytec.de> | 2013-07-19 11:03:35 +0200 |
---|---|---|
committer | Justin Waters <justin.waters@timesys.com> | 2013-11-07 12:19:35 -0500 |
commit | 86dcdca8d73470e5e3511a9d54cbd63361fef299 (patch) | |
tree | eb55dbcfae24ca1a6bf3f965a6f94b709f706818 /drivers | |
parent | 83030bbabf344d47bc44a4a9e4e3043910ac18af (diff) |
imx: fec: Fix worng phy_speed
Fix calculation for phy_speed (MII_SPEED)
and use the right clock (ipg_clk).
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Diffstat (limited to 'drivers')
-rwxr-xr-x | drivers/net/fec.c | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/drivers/net/fec.c b/drivers/net/fec.c index ec7b0895ba99..f62b694673e6 100755 --- a/drivers/net/fec.c +++ b/drivers/net/fec.c @@ -198,6 +198,7 @@ struct fec_enet_private { struct net_device *netdev; struct clk *clk; + struct clk *ipg_clk; /* The saved address of a sent-in-place packet/buffer, for skfree(). */ unsigned char *tx_bounce[TX_RING_SIZE]; @@ -1147,8 +1148,8 @@ static int fec_enet_mii_init(struct platform_device *pdev) /* * Set MII speed to 2.5 MHz (= clk_get_rate() / 2 * phy_speed) */ - fep->phy_speed = DIV_ROUND_UP(clk_get_rate(fep->clk), - (FEC_ENET_MII_CLK << 2)) << 1; + fep->phy_speed = DIV_ROUND_UP(clk_get_rate(fep->ipg_clk), + (FEC_ENET_MII_CLK * 2)) << 1; /* set hold time to 2 internal clock cycle */ if (cpu_is_mx6q() || cpu_is_mx6dl()) @@ -1917,6 +1918,13 @@ fec_probe(struct platform_device *pdev) } clk_enable(fep->clk); + fep->ipg_clk = clk_get(NULL, "ipg_clk"); + if (IS_ERR(fep->ipg_clk)) { + ret = PTR_ERR(fep->ipg_clk); + goto failed_clk; + } + clk_enable(fep->ipg_clk); + ret = fec_enet_init(ndev); if (ret) goto failed_init; @@ -1956,7 +1964,9 @@ failed_register: kfree(fep->ptp_priv); failed_mii_init: failed_init: + clk_disable(fep->ipg_clk); clk_disable(fep->clk); + clk_put(fep->ipg_clk); clk_put(fep->clk); failed_clk: #ifdef CONFIG_MX6_ENET_IRQ_TO_GPIO |