media: camera: tegra: Add 120fps mode for AR0832

Add a new mode, resolution 800x600. This mode supports
120fps in Aptina sensor 120fps.

Bug: 888005
Change-Id: I1e1368e203dfb3dab3d849f038b38cbcd763ecb2
Reviewed-on: http://git-master/r/57565
Reviewed-by: Krupal Divvela <kdivvela@nvidia.com>
Tested-by: Yuvraj Pasi <ypasi@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

1 files changed, 149 insertions, 0 deletions

diff --git a/drivers/media/video/tegra/ar0832_main.c b/drivers/media/video/tegra/ar0832_main.c
index dc390ef128d4..f7bc29597b44 100644
--- a/drivers/media/video/tegra/ar0832_main.c
+++ b/drivers/media/video/tegra/ar0832_main.c
@@ -631,6 +631,151 @@ static struct ar0832_reg mode_1632X1224[] = {
 	{ar0832_TABLE_END, 0x0000}
 };
 
+
+static struct ar0832_reg mode_800X600[] = {
+	{0x301A, 0x0058},	/* RESET_REGISTER */
+	{0x301A, 0x0050},	/* RESET_REGISTER */
+
+	/* SC-CHANGE: to-do 8 bit write */
+	{0x0104, 0x0100},	/* GROUPED_PARAMETER_HOLD */
+
+	{0x3064, 0x7800},	/* RESERVED_MFR_3064 */
+	{0x31AE, 0x0202},	/* SERIAL_FORMAT */
+	{0x31B0, 0x0083},	/* FRAME_PREAMBLE */
+	{0x31B2, 0x004D},	/* LINE_PREAMBLE */
+	{0x31B4, 0x0E88},	/* MIPI_TIMING_0 */
+	{0x31B6, 0x0D24},	/* MIPI_TIMING_1 */
+	{0x31B8, 0x020E},	/* MIPI_TIMING_2 */
+	{0x31BA, 0x0710},	/* MIPI_TIMING_3 */
+	{0x31BC, 0x2A0D},	/* MIPI_TIMING_4 */
+	{ar0832_TABLE_WAIT_MS, 0x0005},
+	{0x0112, 0x0A0A},	/* CCP_DATA_FORMAT */
+	{0x3044, 0x0590},	/* RESERVED_MFR_3044 */
+	{0x306E, 0xFC80},	/* DATAPATH_SELECT */
+	{0x30B2, 0xC000},	/* RESERVED_MFR_30B2 */
+	{0x30D6, 0x0800},	/* RESERVED_MFR_30D6 */
+	{0x316C, 0xB42F},	/* RESERVED_MFR_316C */
+	{0x316E, 0x869A},	/* RESERVED_MFR_316E */
+	{0x3170, 0x210E},	/* RESERVED_MFR_3170 */
+	{0x317A, 0x010E},	/* RESERVED_MFR_317A */
+	{0x31E0, 0x1FB9},	/* RESERVED_MFR_31E0 */
+	{0x31E6, 0x07FC},	/* RESERVED_MFR_31E6 */
+	{0x37C0, 0x0000},	/* P_GR_Q5 */
+	{0x37C2, 0x0000},	/* P_RD_Q5 */
+	{0x37C4, 0x0000},	/* P_BL_Q5 */
+	{0x37C6, 0x0000},	/* P_GB_Q5 */
+	{0x3E00, 0x0011},	/* RESERVED_MFR_3E00 */
+	{0x3E02, 0x8801},	/* RESERVED_MFR_3E02 */
+	{0x3E04, 0x2801},	/* RESERVED_MFR_3E04 */
+	{0x3E06, 0x8449},	/* RESERVED_MFR_3E06 */
+	{0x3E08, 0x6841},	/* RESERVED_MFR_3E08 */
+	{0x3E0A, 0x400C},	/* RESERVED_MFR_3E0A */
+	{0x3E0C, 0x1001},	/* RESERVED_MFR_3E0C */
+	{0x3E0E, 0x2603},	/* RESERVED_MFR_3E0E */
+	{0x3E10, 0x4B41},	/* RESERVED_MFR_3E10 */
+	{0x3E12, 0x4B24},	/* RESERVED_MFR_3E12 */
+	{0x3E14, 0xA3CF},	/* RESERVED_MFR_3E14 */
+	{0x3E16, 0x8802},	/* RESERVED_MFR_3E16 */
+	{0x3E18, 0x84FF},	/* RESERVED_MFR_3E18 */
+	{0x3E1A, 0x8601},	/* RESERVED_MFR_3E1A */
+	{0x3E1C, 0x8401},	/* RESERVED_MFR_3E1C */
+	{0x3E1E, 0x840A},	/* RESERVED_MFR_3E1E */
+	{0x3E20, 0xFF00},	/* RESERVED_MFR_3E20 */
+	{0x3E22, 0x8401},	/* RESERVED_MFR_3E22 */
+	{0x3E24, 0x00FF},	/* RESERVED_MFR_3E24 */
+	{0x3E26, 0x0088},	/* RESERVED_MFR_3E26 */
+	{0x3E28, 0x2E8A},	/* RESERVED_MFR_3E28 */
+	{0x3E30, 0x0000},	/* RESERVED_MFR_3E30 */
+	{0x3E32, 0x8801},	/* RESERVED_MFR_3E32 */
+	{0x3E34, 0x4029},	/* RESERVED_MFR_3E34 */
+	{0x3E36, 0x00FF},	/* RESERVED_MFR_3E36 */
+	{0x3E38, 0x8469},	/* RESERVED_MFR_3E38 */
+	{0x3E3A, 0x00FF},	/* RESERVED_MFR_3E3A */
+	{0x3E3C, 0x2801},	/* RESERVED_MFR_3E3C */
+	{0x3E3E, 0x3E2A},	/* RESERVED_MFR_3E3E */
+	{0x3E40, 0x1C01},	/* RESERVED_MFR_3E40 */
+	{0x3E42, 0xFF84},	/* RESERVED_MFR_3E42 */
+	{0x3E44, 0x8401},	/* RESERVED_MFR_3E44 */
+	{0x3E46, 0x0C01},	/* RESERVED_MFR_3E46 */
+	{0x3E48, 0x8401},	/* RESERVED_MFR_3E48 */
+	{0x3E4A, 0x00FF},	/* RESERVED_MFR_3E4A */
+	{0x3E4C, 0x8402},	/* RESERVED_MFR_3E4C */
+	{0x3E4E, 0x8984},	/* RESERVED_MFR_3E4E */
+	{0x3E50, 0x6628},	/* RESERVED_MFR_3E50 */
+	{0x3E52, 0x8340},	/* RESERVED_MFR_3E52 */
+	{0x3E54, 0x00FF},	/* RESERVED_MFR_3E54 */
+	{0x3E56, 0x4A42},	/* RESERVED_MFR_3E56 */
+	{0x3E58, 0x2703},	/* RESERVED_MFR_3E58 */
+	{0x3E5A, 0x6752},	/* RESERVED_MFR_3E5A */
+	{0x3E5C, 0x3F2A},	/* RESERVED_MFR_3E5C */
+	{0x3E5E, 0x846A},	/* RESERVED_MFR_3E5E */
+	{0x3E60, 0x4C01},	/* RESERVED_MFR_3E60 */
+	{0x3E62, 0x8401},	/* RESERVED_MFR_3E62 */
+	{0x3E66, 0x3901},	/* RESERVED_MFR_3E66 */
+	{0x3E90, 0x2C01},	/* RESERVED_MFR_3E90 */
+	{0x3E98, 0x2B02},	/* RESERVED_MFR_3E98 */
+	{0x3E92, 0x2A04},	/* RESERVED_MFR_3E92 */
+	{0x3E94, 0x2509},	/* RESERVED_MFR_3E94 */
+	{0x3E96, 0x0000},	/* RESERVED_MFR_3E96 */
+	{0x3E9A, 0x2905},	/* RESERVED_MFR_3E9A */
+	{0x3E9C, 0x00FF},	/* RESERVED_MFR_3E9C */
+	{0x3ECC, 0x00EB},	/* RESERVED_MFR_3ECC */
+	{0x3ED0, 0x1E24},	/* RESERVED_MFR_3ED0 */
+	{0x3ED4, 0xAFC4},	/* RESERVED_MFR_3ED4 */
+	{0x3ED6, 0x909B},	/* RESERVED_MFR_3ED6 */
+	{0x3EE0, 0x2424},	/* RESERVED_MFR_3EE0 */
+	{0x3EE2, 0x9797},	/* RESERVED_MFR_3EE2 */
+	{0x3EE4, 0xC100},	/* RESERVED_MFR_3EE4 */
+	{0x3EE6, 0x0540},	/* RESERVED_MFR_3EE6 */
+	{0x3174, 0x8000},	/* RESERVED_MFR_3174 */
+	{0x0300, 0x0004},	/* VT_PIX_CLK_DIV */
+	{0x0302, 0x0001},	/* VT_SYS_CLK_DIV */
+	{0x0304, 0x0002},	/* PRE_PLL_CLK_DIV */
+
+	{0x0306, 0x0042},	/* PLL_MULTIPLIER */
+
+	{0x0308, 0x000A},	/* OP_PIX_CLK_DIV */
+	{0x030A, 0x0001},	/* OP_SYS_CLK_DIV */
+	{ar0832_TABLE_WAIT_MS, 0x0001}, /* waitmsec 1 */
+
+	{0x3064, 0x7400},	/* RESERVED_MFR_3064 */
+
+	{0x0104, 0x0100},	/* GROUPED_PARAMETER_HOLD */
+
+	{0x0344, 0x04D8},	/* X_ADDR_START */
+	{0x0348, 0x07F7},	/* X_ADDR_END */
+	{0x0346, 0x03A4},	/* Y_ADDR_START */
+	{0x034A, 0x05FB},	/* Y_ADDR_END */
+	{0x034C, 0x0320},	/* X_OUTPUT_SIZE */
+	{0x034E, 0x0260},	/* Y_OUTPUT_SIZE */
+	{0x3040, 0x0041},	/* READ_MODE */
+	{0x306E, 0xFC80},	/* DATAPATH_SELECT */
+	{0x3178, 0x0000},	/* RESERVED_MFR_3178 */
+	{0x3ED0, 0x1E24},	/* RESERVED_MFR_3ED0 */
+	{0x0400, 0x0002},	/* SCALING_MODE */
+	{0x0404, 0x0010},	/* SCALE_M */
+	{0x0342, 0x08A8},	/* LINE_LENGTH_PCK */
+	{0x0340, 0x02E7},	/* FRAME_LENGTH_LINES */
+	{0x0202, 0x02E7},	/* COARSE_INTEGRATION_TIME */
+	{0x3014, 0x03F6},	/* FINE_INTEGRATION_TIME */
+	{0x3010, 0x0078},	/* FINE_CORRECTION */
+	{0x301A, 0x8250},	/* RESET_REGISTER */
+	{0x301A, 0x8650},	/* RESET_REGISTER */
+	{0x301A, 0x8658},	/* RESET_REGISTER */
+
+	/* gain */
+	{0x3056, 0x10AA},	/* gain */
+	{0x3058, 0x10AA},	/* gain */
+	{0x305a, 0x10AA},	/* gain */
+	{0x305c, 0x10AA},	/* gain */
+
+	/* todo 8-bit write */
+	{0x0104, 0x0000},	/* GROUPED_PARAMETER_HOLD */
+
+	{0x301A, 0x065C},	/* RESET_REGISTER */
+	{ar0832_TABLE_END, 0x0000}
+};
+
 static struct ar0832_reg mode_end[] = {
 	{ar0832_TABLE_END, 0x0000}
 };
@@ -640,6 +785,7 @@ enum {
 	ar0832_MODE_2880X1620,
 	ar0832_MODE_1920X1080,
 	ar0832_MODE_1632X1224,
+	ar0832_MODE_800X600
 };
 
 static struct ar0832_reg *mode_table[] = {
@@ -647,6 +793,7 @@ static struct ar0832_reg *mode_table[] = {
 	[ar0832_MODE_2880X1620] = mode_2880X1620,
 	[ar0832_MODE_1920X1080] = mode_1920X1080,
 	[ar0832_MODE_1632X1224] = mode_1632X1224,
+	[ar0832_MODE_800X600]   = mode_800X600,
 };
 
 static inline void ar0832_msleep(u32 t)
@@ -933,6 +1080,8 @@ static int ar0832_set_mode(struct ar0832_dev *dev,
 		sensor_mode = ar0832_MODE_1920X1080;
 	else if (mode->xres == 1632 && mode->yres == 1224)
 		sensor_mode = ar0832_MODE_1632X1224;
+	else if (mode->xres == 800 && mode->yres == 600)
+		sensor_mode = ar0832_MODE_800X600;
 	else {
 		dev_err(&i2c_client->dev,
 			"%s: invalid resolution supplied to set mode %d %d\n",