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| author | Clément Péron <peron.clem@gmail.com> | 2018-10-09 13:28:37 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-12-17 20:38:18 +0100 |
| commit | c02b397e8a82297738dd8cc48bc072f27297ccf7 (patch) | |
| tree | a34ae51d009499ce316fba2860c6484a44349aaf /fs | |
| parent | 180b858fb530f4c38b3668da16b22f35461a8c70 (diff) | |
ARM: debug: enable UART1 for socfpga Cyclone5
[ Upstream commit f6628486c8489e91c513b62608f89ccdb745600d ]
Cyclone5 and Arria10 doesn't have the same memory map for UART1.
Split the SOCFPGA_UART1 into 2 options to allow debugging on UART1 for Cyclone5.
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'fs')
0 files changed, 0 insertions, 0 deletions