diff options
| author | Graf Yang <graf.yang@analog.com> | 2008-04-25 03:09:15 +0800 |
|---|---|---|
| committer | Bryan Wu <cooloney@kernel.org> | 2008-04-25 03:09:15 +0800 |
| commit | 5be36d22b28f01e5074f78b29aa6128da0a53641 (patch) | |
| tree | 1fda8bcb0680eda6a826fc3753ee8c9f52a2c75b /include/asm-blackfin/mach-bf548/blackfin.h | |
| parent | 37b6972ad8fb08d438fd600888aff212b1b193b0 (diff) | |
[Blackfin] arch: add Blackfin on-chip SIR IrDA driver support
- add platform device resources in board files
- add new bfin_sir.h to each machines
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'include/asm-blackfin/mach-bf548/blackfin.h')
| -rw-r--r-- | include/asm-blackfin/mach-bf548/blackfin.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/include/asm-blackfin/mach-bf548/blackfin.h b/include/asm-blackfin/mach-bf548/blackfin.h index b8509c16ecd4..d6ee74ac0460 100644 --- a/include/asm-blackfin/mach-bf548/blackfin.h +++ b/include/asm-blackfin/mach-bf548/blackfin.h @@ -166,6 +166,21 @@ #define BFIN_UART_SCR UART1_SCR #define BFIN_UART_GCTL UART1_GCTL +#define BFIN_UART_NR_PORTS 4 + +#define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */ +#define OFFSET_DLH 0x04 /* Divisor Latch (High-Byte) */ +#define OFFSET_GCTL 0x08 /* Global Control Register */ +#define OFFSET_LCR 0x0C /* Line Control Register */ +#define OFFSET_MCR 0x10 /* Modem Control Register */ +#define OFFSET_LSR 0x14 /* Line Status Register */ +#define OFFSET_MSR 0x18 /* Modem Status Register */ +#define OFFSET_SCR 0x1C /* SCR Scratch Register */ +#define OFFSET_IER_SET 0x20 /* Set Interrupt Enable Register */ +#define OFFSET_IER_CLEAR 0x24 /* Clear Interrupt Enable Register */ +#define OFFSET_THR 0x28 /* Transmit Holding register */ +#define OFFSET_RBR 0x2C /* Receive Buffer register */ + /* PLL_DIV Masks */ #define CCLK_DIV1 CSEL_DIV1 /* CCLK = VCO / 1 */ #define CCLK_DIV2 CSEL_DIV2 /* CCLK = VCO / 2 */ |