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authorIngo Molnar <mingo@elte.hu>2008-06-25 12:29:32 +0200
committerIngo Molnar <mingo@elte.hu>2008-06-25 12:29:32 +0200
commit1262b0088f3c1928c0487d4074c6cda11a8b78c6 (patch)
tree688de0df6f0bca72a40014023e9d3c42e9bea6f4 /include/asm-mips
parent378fc6eedc0091cc5ba65b298b8967bd2d43df5d (diff)
parent543cf4cb3fe6f6cae3651ba918b9c56200b257d0 (diff)
Merge branch 'linus' into x86/cleanupstip-x86-cleanups-2008-06-25_10.29_Wed
Diffstat (limited to 'include/asm-mips')
-rw-r--r--include/asm-mips/cpu-info.h4
-rw-r--r--include/asm-mips/gic.h4
-rw-r--r--include/asm-mips/lasat/serial.h4
-rw-r--r--include/asm-mips/mach-au1x00/au1000.h1
-rw-r--r--include/asm-mips/pgtable-bits.h2
5 files changed, 7 insertions, 8 deletions
diff --git a/include/asm-mips/cpu-info.h b/include/asm-mips/cpu-info.h
index 0c5a358863f3..2de73dbb2e9e 100644
--- a/include/asm-mips/cpu-info.h
+++ b/include/asm-mips/cpu-info.h
@@ -56,7 +56,7 @@ struct cpuinfo_mips {
struct cache_desc tcache; /* Tertiary/split secondary cache */
int srsets; /* Shadow register sets */
int core; /* physical core number */
-#if defined(CONFIG_MIPS_MT_SMTC)
+#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC)
/*
* In the MIPS MT "SMTC" model, each TC is considered
* to be a "CPU" for the purposes of scheduling, but
@@ -64,7 +64,7 @@ struct cpuinfo_mips {
* to all TCs within the same VPE.
*/
int vpe_id; /* Virtual Processor number */
-#endif /* CONFIG_MIPS_MT */
+#endif
#ifdef CONFIG_MIPS_MT_SMTC
int tc_id; /* Thread Context number */
#endif
diff --git a/include/asm-mips/gic.h b/include/asm-mips/gic.h
index 3a492f225f00..954807d9d66a 100644
--- a/include/asm-mips/gic.h
+++ b/include/asm-mips/gic.h
@@ -24,8 +24,8 @@
#define MSK(n) ((1 << (n)) - 1)
#define REG32(addr) (*(volatile unsigned int *) (addr))
-#define REG(base, offs) REG32((unsigned int)(base) + offs##_##OFS)
-#define REGP(base, phys) REG32((unsigned int)(base) + (phys))
+#define REG(base, offs) REG32((unsigned long)(base) + offs##_##OFS)
+#define REGP(base, phys) REG32((unsigned long)(base) + (phys))
/* Accessors */
#define GIC_REG(segment, offset) \
diff --git a/include/asm-mips/lasat/serial.h b/include/asm-mips/lasat/serial.h
index bafe68b10614..1c37d70579b8 100644
--- a/include/asm-mips/lasat/serial.h
+++ b/include/asm-mips/lasat/serial.h
@@ -4,10 +4,10 @@
#define LASAT_BASE_BAUD_100 (7372800 / 16)
#define LASAT_UART_REGS_BASE_100 0x1c8b0000
#define LASAT_UART_REGS_SHIFT_100 2
-#define LASATINT_UART_100 8
+#define LASATINT_UART_100 16
/* * LASAT 200 boards serial configuration */
#define LASAT_BASE_BAUD_200 (100000000 / 16 / 12)
#define LASAT_UART_REGS_BASE_200 (Vrc5074_PHYS_BASE + 0x0300)
#define LASAT_UART_REGS_SHIFT_200 3
-#define LASATINT_UART_200 13
+#define LASATINT_UART_200 21
diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h
index 1b5064dac007..0d302bad4492 100644
--- a/include/asm-mips/mach-au1x00/au1000.h
+++ b/include/asm-mips/mach-au1x00/au1000.h
@@ -615,6 +615,7 @@ enum soc_au1500_ints {
AU1000_RTC_MATCH1_INT,
AU1000_RTC_MATCH2_INT,
AU1500_PCI_ERR_INT,
+ AU1500_RESERVED_INT,
AU1000_USB_DEV_REQ_INT,
AU1000_USB_DEV_SUS_INT,
AU1000_USB_HOST_INT,
diff --git a/include/asm-mips/pgtable-bits.h b/include/asm-mips/pgtable-bits.h
index 60e2f9338fcd..51b34a48c84a 100644
--- a/include/asm-mips/pgtable-bits.h
+++ b/include/asm-mips/pgtable-bits.h
@@ -134,6 +134,4 @@
#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED | _CACHE_MASK)
-#define CONF_CM_DEFAULT (PAGE_CACHABLE_DEFAULT>>_CACHE_SHIFT)
-
#endif /* _ASM_PGTABLE_BITS_H */