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authorStefan Agner <stefan@agner.ch>2017-10-27 13:39:15 -0500
committerLeonard Crestez <leonard.crestez@nxp.com>2018-08-24 12:41:33 +0300
commita9994a350ed795a356f4fdf109a44f4dc1c416b7 (patch)
tree3b8ff9d8a36d564088a95553592c9b9bb33686df /include/dt-bindings
parentcf913f93251ab47ad57a17ac8e409aec917ad007 (diff)
MLK-16769-1: clk: imx7d: create clocks behind rawnand clock gate
Merge community clock code change for i.MX7D. The rawnand clock gate gates two clocks, NAND_USDHC_BUS_CLK_ROOT and NAND_CLK_ROOT. However, the gate has been in the chain of the latter only. This does not allow to use the NAND_USDHC_BUS_CLK_ROOT only, e.g. as required by APBH-Bridge-DMA. Add new clocks which represent the clock after the gate, and use a shared clock gate to correctly model the hardware. Signed-off-by: Han Xu <han.xu@nxp.com>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/imx7d-clock.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/imx7d-clock.h b/include/dt-bindings/clock/imx7d-clock.h
index 409611cb5f79..feb3a3031e00 100644
--- a/include/dt-bindings/clock/imx7d-clock.h
+++ b/include/dt-bindings/clock/imx7d-clock.h
@@ -452,6 +452,8 @@
#define IMX7D_PXP_AXI_CLK 438
#define IMX7D_ENET1_IPG_ROOT_CLK 439
#define IMX7D_ENET2_IPG_ROOT_CLK 440
-#define IMX7D_CLK_END 441
+#define IMX7D_NAND_RAWNAND_CLK 441
+#define IMX7D_NAND_USDHC_BUS_RAWNAND_CLK 442
+#define IMX7D_CLK_END 443
#endif /* __DT_BINDINGS_CLOCK_IMX7D_H */