diff options
| author | Richard Zhu <Richard.Zhu@freescale.com> | 2015-03-13 16:24:11 +0800 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@nxp.com> | 2016-01-14 11:01:37 -0600 |
| commit | 42bf93ab93ea6d64d27036ccef2003325090446a (patch) | |
| tree | 53564a901d3b44359be9aaa215c317fba4e8d0fd /include/linux/mfd | |
| parent | 2a80d08745516b28f867423f3fce2e414172a1b1 (diff) | |
MLK-10466-2 ARM: imx: add the pcie related macros definitions
add the pcie related macros definitions into gpr.
Signed-off-by: Richard Zhu <Richard.Zhu@freescale.com>
(cherry picked from commit b4a5b2e53b2e743824d0af7428f7d9d406bec8bd)
Diffstat (limited to 'include/linux/mfd')
| -rw-r--r-- | include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h index 0730e2aad5af..720b46c325f2 100644 --- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h +++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h @@ -95,11 +95,13 @@ #define IMX6Q_GPR0_DMAREQ_MUX_SEL0_IOMUX BIT(0) #define IMX6Q_GPR1_PCIE_REQ_MASK (0x3 << 30) +#define IMX6Q_GPR1_PCIE_SW_RST BIT(29) #define IMX6Q_GPR1_PCIE_EXIT_L1 BIT(28) #define IMX6Q_GPR1_PCIE_RDY_L23 BIT(27) #define IMX6Q_GPR1_PCIE_ENTER_L1 BIT(26) #define IMX6Q_GPR1_MIPI_COLOR_SW BIT(25) #define IMX6Q_GPR1_DPI_OFF BIT(24) +#define IMX6Q_GPR1_PCIE_SW_PERST BIT(23) #define IMX6Q_GPR1_EXC_MON_MASK BIT(22) #define IMX6Q_GPR1_EXC_MON_OKAY 0x0 #define IMX6Q_GPR1_EXC_MON_SLVE BIT(22) @@ -316,6 +318,7 @@ #define IMX6Q_GPR12_ARMP_AHB_CLK_EN BIT(26) #define IMX6Q_GPR12_ARMP_ATB_CLK_EN BIT(25) #define IMX6Q_GPR12_ARMP_APB_CLK_EN BIT(24) +#define IMX6Q_GPR12_PCIE_PM_TURN_OFF BIT(16) #define IMX6Q_GPR12_DEVICE_TYPE (0xf << 12) #define IMX6Q_GPR12_PCIE_CTL_2 BIT(10) #define IMX6Q_GPR12_LOS_LEVEL (0x1f << 4) |