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authorPavan Kunapuli <pkunapuli@nvidia.com>2013-07-30 16:21:16 +0530
committerDan Willemsen <dwillemsen@nvidia.com>2013-09-14 13:38:02 -0700
commit7d11f0b33c2f5cebf68450b269561cb6265f5132 (patch)
tree46eefc7a0d68b7c334558bea44e69c6d3200f49d /include/linux/mmc
parent44405d5d1d702264d62f5986bfabe050d155a608 (diff)
mmc: sdhci: Enable host clock before reg access
Some SDMMC controllers require host clock to be enabled before accessing the controller registers. Define SDHCI_QUIRK2_REG_ACCESS_REQ_HOST_CLK to handle this behavior. Ensure clock is enabled before register accesses in suspend/resume path. Enabled SDHCI_QUIRK2_REG_ACCESS_REQ_HOST_CLK for Tegra SDMMC controllers. Bug 1328858 Change-Id: I732d0597a715c96bc546beb4bba1beb86e51c302 Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-on: http://git-master/r/255600 Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Diffstat (limited to 'include/linux/mmc')
-rw-r--r--include/linux/mmc/sdhci.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h
index e5a7a414f8f0..3f1b5e19fa1d 100644
--- a/include/linux/mmc/sdhci.h
+++ b/include/linux/mmc/sdhci.h
@@ -110,6 +110,8 @@ struct sdhci_host {
/* The system physically doesn't support 1.8v, even if the host does */
#define SDHCI_QUIRK2_NO_1_8_V (1<<2)
#define SDHCI_QUIRK2_PRESET_VALUE_BROKEN (1<<3)
+/* Controller clock should be ON for register access */
+#define SDHCI_QUIRK2_REG_ACCESS_REQ_HOST_CLK (1<<4)
int irq; /* Device IRQ */
void __iomem *ioaddr; /* Mapped address */