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authorBrian Norris <norris@broadcom.com>2010-08-19 08:11:02 -0700
committerDavid Woodhouse <David.Woodhouse@intel.com>2010-10-24 23:27:11 +0100
commit2173bae81e17b710328bc877e7b9ade7f4b90064 (patch)
tree7d4faa0e19eebee2343954ea378471be10602abf /include/mtd
parent12c8eb98de747ebc08404e3719c40abb405994e2 (diff)
mtd: nand: spansion S30MLxxxP support
Some Spansion chips have a method for determining eraseblock size that is incompatible with similar ID chips of other sizes. This implements some heuristic detection of these differences. This patch checks for a 5-byte ID with trailing zeros as well as a 512-byte page size to ensure that chips are not misdetected as the S30MLxxxP ORNAND series. [Tweaked by Artem a bit] Signed-off-by: Brian Norris <norris@broadcom.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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