diff options
author | Robert Chiras <robert.chiras@nxp.com> | 2019-02-07 15:04:53 +0200 |
---|---|---|
committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:36:04 +0800 |
commit | 2844bfa4ca912d68758ca734dd56963b7095e481 (patch) | |
tree | f23569e2e312e732d82f8fa1b7d84972b00bd314 /include/video | |
parent | 01ba61aee0e2487e14c11c24a0eb3787fd3c990c (diff) |
MLK-17537-9: gpu/imx: dcss: Add support for mode_valid
Implement mode_valid and mode_fixup functions for the dcss-crtc
driver so that DCSS can filter-out unsupported modes and save the
configuration for the supported ones.
Use mode_fixup to apply the saved configuration of a supported mode.
The mechanism to determine if a mode is supported or not is made in
dcss-dtg.
Also, add 2 new clocks:
- pll: this is the video PLL that provides the pixel clock; it's rate
needs to be set such that the pixel clock can be achieved
- pll_src*: this is an oscillator that can be used as source clock for
the video pll; currently, there are possible maximum 3 pll sources,
defined as pll_src1, pll_src2 and pll_src3. The actual clocks that
can be used as pll source are: CLK_25M, CLK_27M and CLK_PHY_27MHZ
Removed the pdiv_clk and pout_clk and replaced them with pix_clk,
since out of those two only one was used: pdiv_clk, representing the pixel
clock.
In dcss-dtg, each mode is tested and if we can achieve it's pixel
clock we save this mode configuration into an internal list and apply this
configuration later on when mode_fixup is called.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Diffstat (limited to 'include/video')
-rw-r--r-- | include/video/imx-dcss.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/video/imx-dcss.h b/include/video/imx-dcss.h index ef2f0a739101..83a9796067f5 100644 --- a/include/video/imx-dcss.h +++ b/include/video/imx-dcss.h @@ -84,6 +84,8 @@ void dcss_dpr_tile_derive(struct dcss_soc *dcss, void dcss_dpr_set_rotation(struct dcss_soc *dcss, int ch_num, u32 rotation); /* DTG */ +int dcss_dtg_mode_valid(struct dcss_soc *dcss, int clock, int crtc_clock); +int dcss_dtg_mode_fixup(struct dcss_soc *dcss, int clock); void dcss_dtg_sync_set(struct dcss_soc *dcss, struct videomode *vm); void dcss_dtg_plane_pos_set(struct dcss_soc *dcss, int ch_num, int px, int py, int pw, int ph); |