diff options
| author | Liu Ying <victor.liu@nxp.com> | 2018-06-01 16:14:40 +0800 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:32:00 +0800 |
| commit | 79191710d06d1852e2cf9d8223fa60aa8b94b2a4 (patch) | |
| tree | 701a1bf5c6ca172de4c6bd03ad262bf169ab77bb /include/video | |
| parent | 7f6550487adc8d9e0a180a34e6bef20d201cfc8d (diff) | |
MLK-18477-2 gpu: imx: dpu: framegen: Explicitly use bypass clk for TMDS encoder
The framegen driver should get PLL clock, bypass clock and display
selection/mux clock via device tree if available. It may use bypass
clock when a TMDS encoder is connected with the framegen, otherwise,
PLL clock is used. This way, the assigned-clocks and assigned-clock-parents
device tree properties can be removed from the dpu device tree node.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Diffstat (limited to 'include/video')
| -rw-r--r-- | include/video/dpu.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/include/video/dpu.h b/include/video/dpu.h index 57d24ee70cf0..88c123af5f96 100644 --- a/include/video/dpu.h +++ b/include/video/dpu.h @@ -591,8 +591,9 @@ struct dpu_framegen; void framegen_enable(struct dpu_framegen *fg); void framegen_disable(struct dpu_framegen *fg); void framegen_shdtokgen(struct dpu_framegen *fg); -void framegen_cfg_videomode(struct dpu_framegen *fg, - struct drm_display_mode *m); +void +framegen_cfg_videomode(struct dpu_framegen *fg, struct drm_display_mode *m, + bool encoder_type_has_tmds); void framegen_pkickconfig(struct dpu_framegen *fg, bool enable); void framegen_sacfg(struct dpu_framegen *fg, unsigned int x, unsigned int y); void framegen_displaymode(struct dpu_framegen *fg, fgdm_t mode); |