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authorLiu Ying <victor.liu@nxp.com>2018-04-12 12:40:48 +0800
committerJason Liu <jason.hui.liu@nxp.com>2019-02-12 10:31:14 +0800
commitaf38948ecbed46f375242f1eb47336fe15d3f0f9 (patch)
tree6d6305baaf7b213d84947d9f569bc4b643bb4378 /include/video
parent2600fe73165335eaf19e91ad5590a518c2630625 (diff)
MLK-18009 drm/imx: dpu: plane: Support deinterlacing via fetchdecode & vscaler
Fetchdecode may work together with vscaler to do bob deinterlacing. This patch adds the deinterlacing support for DPU DRM plane by using them. Signed-off-by: Liu Ying <victor.liu@nxp.com>
Diffstat (limited to 'include/video')
-rw-r--r--include/video/dpu.h22
-rw-r--r--include/video/imx8-prefetch.h2
2 files changed, 13 insertions, 11 deletions
diff --git a/include/video/dpu.h b/include/video/dpu.h
index 99b2b6aa7de6..bfbd51621376 100644
--- a/include/video/dpu.h
+++ b/include/video/dpu.h
@@ -480,8 +480,8 @@ void fetchdecode_source_stride(struct dpu_fetchdecode *fd, unsigned int width,
int bpp, unsigned int stride,
dma_addr_t baddr, bool use_prefetch);
void fetchdecode_src_buf_dimensions(struct dpu_fetchdecode *fd, unsigned int w,
- unsigned int h);
-void fetchdecode_set_fmt(struct dpu_fetchdecode *fd, u32 fmt);
+ unsigned int h, bool deinterlace);
+void fetchdecode_set_fmt(struct dpu_fetchdecode *fd, u32 fmt, bool deinterlace);
void fetchdecode_layeroffset(struct dpu_fetchdecode *fd, unsigned int x,
unsigned int y);
void fetchdecode_clipoffset(struct dpu_fetchdecode *fd, unsigned int x,
@@ -492,7 +492,7 @@ void fetchdecode_source_buffer_enable(struct dpu_fetchdecode *fd);
void fetchdecode_source_buffer_disable(struct dpu_fetchdecode *fd);
bool fetchdecode_is_enabled(struct dpu_fetchdecode *fd);
void fetchdecode_framedimensions(struct dpu_fetchdecode *fd, unsigned int w,
- unsigned int h);
+ unsigned int h, bool deinterlace);
void fetchdecode_rgb_constantcolor(struct dpu_fetchdecode *fd,
u8 r, u8 g, u8 b, u8 a);
void fetchdecode_yuv_constantcolor(struct dpu_fetchdecode *fd,
@@ -511,7 +511,8 @@ fetchdecode_configure_prefetch(struct dpu_fetchdecode *fd,
unsigned int x_offset, unsigned int y_offset,
unsigned int stride, u32 format, u64 modifier,
unsigned long baddr, unsigned long uv_baddr,
- bool start, bool aux_start);
+ bool start, bool aux_start,
+ bool fb_is_interlaced);
void fetchdecode_enable_prefetch(struct dpu_fetchdecode *fd);
void fetchdecode_disable_prefetch(struct dpu_fetchdecode *fd);
void fetchdecode_reg_update_prefetch(struct dpu_fetchdecode *fd);
@@ -550,7 +551,7 @@ void fetcheco_source_stride(struct dpu_fetcheco *fe, unsigned int width,
int bpp, unsigned int stride,
dma_addr_t baddr, bool use_prefetch);
void fetcheco_src_buf_dimensions(struct dpu_fetcheco *fe, unsigned int w,
- unsigned int h, u32 fmt);
+ unsigned int h, u32 fmt, bool deinterlace);
void fetcheco_set_fmt(struct dpu_fetcheco *fe, u32 fmt);
void fetcheco_layeroffset(struct dpu_fetcheco *fe, unsigned int x,
unsigned int y);
@@ -562,7 +563,7 @@ void fetcheco_source_buffer_enable(struct dpu_fetcheco *fe);
void fetcheco_source_buffer_disable(struct dpu_fetcheco *fe);
bool fetcheco_is_enabled(struct dpu_fetcheco *fe);
void fetcheco_framedimensions(struct dpu_fetcheco *fe, unsigned int w,
- unsigned int h);
+ unsigned int h, bool deinterlace);
void fetcheco_frameresampling(struct dpu_fetcheco *fe, unsigned int x,
unsigned int y);
void fetcheco_controltrigger(struct dpu_fetcheco *fe, bool trigger);
@@ -772,9 +773,9 @@ struct dpu_vscaler;
int vscaler_pixengcfg_dynamic_src_sel(struct dpu_vscaler *vs, vs_src_sel_t src);
void vscaler_pixengcfg_clken(struct dpu_vscaler *vs, pixengcfg_clken_t clken);
void vscaler_shden(struct dpu_vscaler *vs, bool enable);
-void vscaler_setup1(struct dpu_vscaler *vs, unsigned int src, unsigned int dst);
-void vscaler_setup2(struct dpu_vscaler *vs, u32 phase_offset);
-void vscaler_setup3(struct dpu_vscaler *vs, u32 phase_offset);
+void vscaler_setup1(struct dpu_vscaler *vs, u32 src, u32 dst, bool deinterlace);
+void vscaler_setup2(struct dpu_vscaler *vs, bool deinterlace);
+void vscaler_setup3(struct dpu_vscaler *vs, bool deinterlace);
void vscaler_setup4(struct dpu_vscaler *vs, u32 phase_offset);
void vscaler_setup5(struct dpu_vscaler *vs, u32 phase_offset);
void vscaler_output_size(struct dpu_vscaler *vs, u32 line_num);
@@ -834,7 +835,8 @@ void fetchunit_configure_prefetch(struct dpu_fetchdecode *fd,
unsigned int x_offset, unsigned int y_offset,
unsigned int stride, u32 format, u64 modifier,
unsigned long baddr, unsigned long uv_baddr,
- bool start, bool aux_start);
+ bool start, bool aux_start,
+ bool fb_is_interlaced);
void fetchunit_enable_prefetch(struct dpu_fetchdecode *fd,
struct dpu_fetchlayer *fl,
struct dpu_fetchwarp *fw);
diff --git a/include/video/imx8-prefetch.h b/include/video/imx8-prefetch.h
index 2a7c972ada4c..83769f096f5d 100644
--- a/include/video/imx8-prefetch.h
+++ b/include/video/imx8-prefetch.h
@@ -54,7 +54,7 @@ void dprc_configure(struct dprc *dprc, unsigned int stream_id,
unsigned int x_offset, unsigned int y_offset,
unsigned int stride, u32 format, u64 modifier,
unsigned long baddr, unsigned long uv_baddr,
- bool start, bool aux_start);
+ bool start, bool aux_start, bool interlace_frame);
void dprc_reg_update(struct dprc *dprc);
void dprc_first_frame_handle(struct dprc *dprc);
void dprc_irq_handle(struct dprc *dprc);