Merge branch 'linux-tegra-nv-2.6.39' into android-tegra-nv-2.6.39

Conflicts:
	arch/arm/mach-tegra/board-cardhu.c
	arch/arm/mach-tegra/board-enterprise-panel.c
	arch/arm/mach-tegra/board-enterprise.c
	arch/arm/mach-tegra/tegra_odm_fuses.c
	drivers/video/tegra/dc/hdmi.c

Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>

29 files changed, 1640 insertions, 133 deletions

diff --git a/include/drm/drm_fixed.h b/include/drm/drm_fixed.h
index 4a08a664ff1f..0ead502e17d2 100644
--- a/include/drm/drm_fixed.h
+++ b/include/drm/drm_fixed.h
@@ -37,6 +37,7 @@ typedef union dfixed {
 #define dfixed_init(A) { .full = dfixed_const((A)) }
 #define dfixed_init_half(A) { .full = dfixed_const_half((A)) }
 #define dfixed_trunc(A) ((A).full >> 12)
+#define dfixed_frac(A) ((A).full & ((1 << 12) - 1))
 
 static inline u32 dfixed_floor(fixed20_12 A)
 {
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index c4681923f21f..01fadbcde797 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -88,6 +88,7 @@ struct fsl_usb2_platform_data {
 	unsigned	invert_pwr_fault:1;
         void		*phy_config;
 	enum fsl_usb2_phy_types usb_phy_type;
+	const char			*charge_regulator;
 };
 
 /* Flags in fsl_usb2_mph_platform_data */
diff --git a/include/linux/i2c-tegra.h b/include/linux/i2c-tegra.h
index d48db31cb9bb..90dcddc52f29 100644
--- a/include/linux/i2c-tegra.h
+++ b/include/linux/i2c-tegra.h
@@ -35,6 +35,9 @@ struct tegra_i2c_platform_data {
 	int retries;
 	int timeout;	/* in jiffies */
 	u16 slave_addr;
+	int scl_gpio[TEGRA_I2C_MAX_BUS];
+	int sda_gpio[TEGRA_I2C_MAX_BUS];
+	int (*arb_recovery)(int scl_gpio, int sda_gpio);
 };
 
 struct tegra_i2c_slave_platform_data {
diff --git a/include/linux/mfd/aat2870.h b/include/linux/mfd/aat2870.h
index d34944e784cf..f7316c29bdec 100644
--- a/include/linux/mfd/aat2870.h
+++ b/include/linux/mfd/aat2870.h
@@ -89,7 +89,7 @@ enum aat2870_id {
 
 /* Backlight current magnitude (mA) */
 enum aat2870_current {
-	AAT2870_CURRENT_0_45,
+	AAT2870_CURRENT_0_45 = 1,
 	AAT2870_CURRENT_0_90,
 	AAT2870_CURRENT_1_80,
 	AAT2870_CURRENT_2_70,
@@ -145,8 +145,7 @@ struct aat2870_data {
 	/* i2c io funcntions */
 	int (*read)(struct aat2870_data *aat2870, u8 addr, u8 *val);
 	int (*write)(struct aat2870_data *aat2870, u8 addr, u8 val);
-	int (*update_bits)(struct aat2870_data *aat2870, u8 addr, u8 mask,
-			   u8 val);
+	int (*update)(struct aat2870_data *aat2870, u8 addr, u8 mask, u8 val);
 
 	/* for debugfs */
 	struct dentry *dentry_root;
diff --git a/include/linux/mfd/max77663-core.h b/include/linux/mfd/max77663-core.h
new file mode 100644
index 000000000000..928f06687770
--- /dev/null
+++ b/include/linux/mfd/max77663-core.h
@@ -0,0 +1,104 @@
+/*
+ * include/linux/mfd/max77663-core.h
+ *
+ * Copyright 2011 Maxim Integrated Products, Inc.
+ * Copyright (C) 2011 NVIDIA Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ */
+
+#ifndef __LINUX_MFD_MAX77663_CORE_H__
+#define __LINUX_MFD_MAX77663_CORE_H__
+
+#include <linux/irq.h>
+#include <linux/mfd/core.h>
+
+/*
+ * Interrupts
+ */
+enum {
+	MAX77663_IRQ_LBT_LB,		/* Low-Battery */
+	MAX77663_IRQ_LBT_THERM_ALRM1,	/* Thermal alarm status, > 120C */
+	MAX77663_IRQ_LBT_THERM_ALRM2,	/* Thermal alarm status, > 140C */
+
+	MAX77663_IRQ_GPIO0,		/* GPIO0 edge detection */
+	MAX77663_IRQ_GPIO1,		/* GPIO1 edge detection */
+	MAX77663_IRQ_GPIO2,		/* GPIO2 edge detection */
+	MAX77663_IRQ_GPIO3,		/* GPIO3 edge detection */
+	MAX77663_IRQ_GPIO4,		/* GPIO4 edge detection */
+	MAX77663_IRQ_GPIO5,		/* GPIO5 edge detection */
+	MAX77663_IRQ_GPIO6,		/* GPIO6 edge detection */
+	MAX77663_IRQ_GPIO7,		/* GPIO7 edge detection */
+
+	MAX77663_IRQ_RTC_1SEC,		/* 1s timer expired */
+	MAX77663_IRQ_RTC_60SEC,		/* 60s timer expired */
+	MAX77663_IRQ_RTC_ALRM1,		/* Alarm 1 */
+	MAX77663_IRQ_RTC_ALRM2,		/* Alarm 2 */
+	MAX77663_IRQ_RTC_SMPL,		/* SMPL(Sudden Momentary Power Loss) */
+
+	MAX77663_IRQ_ONOFF_HRDPOWRN,	/* Hard power off warnning */
+	MAX77663_IRQ_ONOFF_EN0_1SEC,	/* EN0 active for 1s */
+	MAX77663_IRQ_ONOFF_EN0_FALLING,	/* EN0 falling */
+	MAX77663_IRQ_ONOFF_EN0_RISING,	/* EN0 rising */
+	MAX77663_IRQ_ONOFF_LID_FALLING,	/* LID falling */
+	MAX77663_IRQ_ONOFF_LID_RISING,	/* LID rising */
+	MAX77663_IRQ_ONOFF_ACOK_FALLING,/* ACOK falling */
+	MAX77663_IRQ_ONOFF_ACOK_RISING,	/* ACOK rising */
+
+	MAX77663_IRQ_SD_PF,		/* SD power fail */
+	MAX77663_IRQ_LDO_PF,		/* LDO power fail */
+	MAX77663_IRQ_32K,		/* 32kHz oscillator */
+	MAX77663_IRQ_NVER,		/* Non-Volatile Event Recorder */
+
+	MAX77663_IRQ_NR,
+};
+
+/*
+ *GPIOs
+ */
+enum {
+	MAX77663_GPIO0,
+	MAX77663_GPIO1,
+	MAX77663_GPIO2,
+	MAX77663_GPIO3,
+	MAX77663_GPIO4,
+	MAX77663_GPIO5,
+	MAX77663_GPIO6,
+	MAX77663_GPIO7,
+
+	MAX77663_GPIO_NR,
+};
+
+enum max77663_gpio_alternate {
+	GPIO_ALT_DISABLE,
+	GPIO_ALT_ENABLE,
+};
+
+struct max77663_gpio_config {
+	int gpio;	/* gpio number */
+	bool alternate;	/* alternate mode */
+};
+
+struct max77663_platform_data {
+	int irq_base;
+	int gpio_base;
+	int num_gpio_cfg;
+	struct max77663_gpio_config *gpio_cfg;
+
+	int num_subdevs;
+	struct mfd_cell *sub_devices;
+};
+
+int max77663_read(struct device *dev, u8 addr, void *values, u32 len,
+		  bool is_rtc);
+int max77663_write(struct device *dev, u8 addr, void *values, u32 len,
+		   bool is_rtc);
+int max77663_set_bits(struct device *dev, u8 addr, u8 mask, u8 value,
+		      bool is_rtc);
+int max77663_gpio_set_alternate(int gpio, int alternate);
+
+#endif /* __LINUX_MFD_MAX77663_CORE_H__ */
diff --git a/include/linux/mfd/ricoh583.h b/include/linux/mfd/ricoh583.h
new file mode 100644
index 000000000000..e420bc9a57cd
--- /dev/null
+++ b/include/linux/mfd/ricoh583.h
@@ -0,0 +1,127 @@
+/* include/linux/mfd/ricoh583.h
+ *
+ * Core driver interface to access RICOH583 power management chip.
+ *
+ * Copyright (C) 2011 NVIDIA Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ *
+ */
+
+#ifndef __LINUX_MFD_RICOH583_H
+#define __LINUX_MFD_RICOH583_H
+
+/* RICOH583 IRQ definitions */
+enum {
+	RICOH583_IRQ_ONKEY,
+	RICOH583_IRQ_ACOK,
+	RICOH583_IRQ_LIDOPEN,
+	RICOH583_IRQ_PREOT,
+	RICOH583_IRQ_CLKSTP,
+	RICOH583_IRQ_ONKEY_OFF,
+	RICOH583_IRQ_WD,
+	RICOH583_IRQ_EN_PWRREQ1,
+	RICOH583_IRQ_EN_PWRREQ2,
+	RICOH583_IRQ_PRE_VINDET,
+
+	RICOH583_IRQ_DC0LIM,
+	RICOH583_IRQ_DC1LIM,
+	RICOH583_IRQ_DC2LIM,
+	RICOH583_IRQ_DC3LIM,
+
+	RICOH583_IRQ_CTC,
+	RICOH583_IRQ_YALE,
+	RICOH583_IRQ_DALE,
+	RICOH583_IRQ_WALE,
+
+	RICOH583_IRQ_AIN1L,
+	RICOH583_IRQ_AIN2L,
+	RICOH583_IRQ_AIN3L,
+	RICOH583_IRQ_VBATL,
+	RICOH583_IRQ_VIN3L,
+	RICOH583_IRQ_VIN8L,
+	RICOH583_IRQ_AIN1H,
+	RICOH583_IRQ_AIN2H,
+	RICOH583_IRQ_AIN3H,
+	RICOH583_IRQ_VBATH,
+	RICOH583_IRQ_VIN3H,
+	RICOH583_IRQ_VIN8H,
+	RICOH583_IRQ_ADCEND,
+
+	RICOH583_IRQ_GPIO0,
+	RICOH583_IRQ_GPIO1,
+	RICOH583_IRQ_GPIO2,
+	RICOH583_IRQ_GPIO3,
+	RICOH583_IRQ_GPIO4,
+	RICOH583_IRQ_GPIO5,
+	RICOH583_IRQ_GPIO6,
+	RICOH583_IRQ_GPIO7,
+	RICOH583_NR_IRQS,
+};
+
+/* Ricoh583 gpio definitions */
+enum {
+	RICOH583_GPIO0,
+	RICOH583_GPIO1,
+	RICOH583_GPIO2,
+	RICOH583_GPIO3,
+	RICOH583_GPIO4,
+	RICOH583_GPIO5,
+	RICOH583_GPIO6,
+	RICOH583_GPIO7,
+
+	RICOH583_NR_GPIO,
+};
+
+struct ricoh583_subdev_info {
+	int		id;
+	const char	*name;
+	void		*platform_data;
+};
+
+struct ricoh583_rtc_platform_data {
+	int irq;
+};
+
+struct ricoh583_gpio_init_data {
+	unsigned pulldn_en:1;   /* Enable pull down */
+	unsigned output_mode_en:1; /* Enable output mode during init */
+	unsigned output_val:1;  /* Output value if it is in output mode */
+	unsigned init_apply:1;  /* Apply init data on configuring gpios*/
+};
+
+struct ricoh583_platform_data {
+	int		num_subdevs;
+	struct	ricoh583_subdev_info *subdevs;
+	int		gpio_base;
+	int		irq_base;
+
+	struct ricoh583_gpio_init_data *gpio_init_data;
+	int num_gpioinit_data;
+};
+
+extern int ricoh583_read(struct device *dev, uint8_t reg, uint8_t *val);
+extern int ricoh583_bulk_read(struct device *dev, u8 reg, u8 count,
+				uint8_t *val);
+extern int ricoh583_write(struct device *dev, u8 reg, uint8_t val);
+extern int ricoh583_bulk_write(struct device *dev, u8 reg, u8 count,
+				uint8_t *val);
+extern int ricoh583_set_bits(struct device *dev, u8 reg, uint8_t bit_mask);
+extern int ricoh583_clr_bits(struct device *dev, u8 reg, uint8_t bit_mask);
+extern int ricoh583_update(struct device *dev, u8 reg, uint8_t val,
+					uint8_t mask);
+extern int ricoh583_power_off(void);
+
+#endif
diff --git a/include/linux/mfd/tps6586x.h b/include/linux/mfd/tps6586x.h
index 6d6ddc983f10..e43184a43201 100644
--- a/include/linux/mfd/tps6586x.h
+++ b/include/linux/mfd/tps6586x.h
@@ -55,12 +55,27 @@ enum {
 enum pwm_pfm_mode {
 	PWM_ONLY,
 	AUTO_PWM_PFM,
-	NOT_CONFIGURABLE
+	PWM_DEFAULT_VALUE,
+
+};
+
+enum slew_rate_settings {
+	SLEW_RATE_INSTANTLY = 0,
+	SLEW_RATE_0110UV_PER_SEC = 0x1,
+	SLEW_RATE_0220UV_PER_SEC = 0x2,
+	SLEW_RATE_0440UV_PER_SEC = 0x3,
+	SLEW_RATE_0880UV_PER_SEC = 0x4,
+	SLEW_RATE_1760UV_PER_SEC = 0x5,
+	SLEW_RATE_3520UV_PER_SEC = 0x6,
+	SLEW_RATE_7040UV_PER_SEC = 0x7,
+	SLEW_RATE_DEFAULT_VALUE,
 };
 
 struct tps6586x_settings {
 	/* SM0, SM1 and SM2 have PWM-only and auto PWM/PFM mode */
 	enum pwm_pfm_mode sm_pwm_mode;
+	/* SM0 and SM1 have slew rate settings */
+	enum slew_rate_settings slew_rate;
 };
 
 enum {
diff --git a/include/linux/mfd/tps6591x.h b/include/linux/mfd/tps6591x.h
index 2ecbedb6769b..525a8616c44b 100644
--- a/include/linux/mfd/tps6591x.h
+++ b/include/linux/mfd/tps6591x.h
@@ -25,23 +25,6 @@
 
 #include <linux/rtc.h>
 
-#define tps6591x_rails(_name) "tps6591x_"#_name
-
-enum {
-	TPS6591X_ID_VIO,
-	TPS6591X_ID_VDD_1,
-	TPS6591X_ID_VDD_2,
-	TPS6591X_ID_VDDCTRL,
-	TPS6591X_ID_LDO_1,
-	TPS6591X_ID_LDO_2,
-	TPS6591X_ID_LDO_3,
-	TPS6591X_ID_LDO_4,
-	TPS6591X_ID_LDO_5,
-	TPS6591X_ID_LDO_6,
-	TPS6591X_ID_LDO_7,
-	TPS6591X_ID_LDO_8,
-};
-
 enum {
 	TPS6591X_INT_PWRHOLD_F,
 	TPS6591X_INT_VMBHI,
@@ -61,6 +44,25 @@ enum {
 	TPS6591X_INT_VMBCH2_H,
 	TPS6591X_INT_VMBCH2_L,
 	TPS6591X_INT_PWRDN,
+
+	/* Last entry */
+	TPS6591X_INT_NR,
+};
+
+/* Gpio definitions */
+enum {
+	TPS6591X_GPIO_GP0 = 0,
+	TPS6591X_GPIO_GP1 = 1,
+	TPS6591X_GPIO_GP2 = 2,
+	TPS6591X_GPIO_GP3 = 3,
+	TPS6591X_GPIO_GP4 = 4,
+	TPS6591X_GPIO_GP5 = 5,
+	TPS6591X_GPIO_GP6 = 6,
+	TPS6591X_GPIO_GP7 = 7,
+	TPS6591X_GPIO_GP8 = 8,
+
+	/* Last entry */
+	TPS6591X_GPIO_NR,
 };
 
 struct tps6591x_subdev_info {
diff --git a/include/linux/mfd/tps80031.h b/include/linux/mfd/tps80031.h
index f6435611580b..e62cfb30e988 100644
--- a/include/linux/mfd/tps80031.h
+++ b/include/linux/mfd/tps80031.h
@@ -32,27 +32,6 @@ enum chips {
 	TPS80032 = 0x00000002,
 };
 
-#define tps80031_rails(_name) "tps80031_"#_name
-
-enum {
-	TPS80031_ID_VIO,
-	TPS80031_ID_SMPS1,
-	TPS80031_ID_SMPS2,
-	TPS80031_ID_SMPS3,
-	TPS80031_ID_SMPS4,
-	TPS80031_ID_VANA,
-	TPS80031_ID_LDO1,
-	TPS80031_ID_LDO2,
-	TPS80031_ID_LDO3,
-	TPS80031_ID_LDO4,
-	TPS80031_ID_LDO5,
-	TPS80031_ID_LDO6,
-	TPS80031_ID_LDO7,
-	TPS80031_ID_LDOLN,
-	TPS80031_ID_LDOUSB,
-	TPS80031_ID_VBUS,
-};
-
 enum {
 	TPS80031_INT_PWRON,
 	TPS80031_INT_RPWRON,
@@ -86,7 +65,16 @@ enum {
 	TPS80031_INT_LINCH_GATED,
 
 	/* Last interrupt id to get the end number */
-	TPS80031_INT_END,
+	TPS80031_INT_NR,
+};
+
+enum TPS80031_GPIO {
+	TPS80031_GPIO_REGEN1,
+	TPS80031_GPIO_REGEN2,
+	TPS80031_GPIO_SYSEN,
+
+	/* Last entry */
+	TPS80031_GPIO_NR,
 };
 
 enum {
diff --git a/include/linux/nvhost.h b/include/linux/nvhost.h
new file mode 100644
index 000000000000..a1d211de1ef1
--- /dev/null
+++ b/include/linux/nvhost.h
@@ -0,0 +1,73 @@
+/*
+ * include/linux/nvhost.h
+ *
+ * Tegra graphics host driver
+ *
+ * Copyright (c) 2009-2011, NVIDIA Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ */
+
+#ifndef __LINUX_NVHOST_H
+#define __LINUX_NVHOST_H
+
+#include <linux/device.h>
+#include <linux/types.h>
+
+struct nvhost_master;
+
+struct nvhost_device {
+	const char		*name;
+	struct device		dev;
+	int			id;
+	u32			num_resources;
+	struct resource		*resource;
+
+	struct nvhost_master	*host;
+};
+
+extern int nvhost_device_register(struct nvhost_device *);
+extern void nvhost_device_unregister(struct nvhost_device *);
+
+extern struct bus_type nvhost_bus_type;
+
+struct nvhost_driver {
+	int (*probe)(struct nvhost_device *);
+	int (*remove)(struct nvhost_device *);
+	void (*shutdown)(struct nvhost_device *);
+	int (*suspend)(struct nvhost_device *, pm_message_t state);
+	int (*resume)(struct nvhost_device *);
+	struct device_driver driver;
+};
+
+extern int nvhost_driver_register(struct nvhost_driver *);
+extern void nvhost_driver_unregister(struct nvhost_driver *);
+extern struct resource *nvhost_get_resource(struct nvhost_device *,
+		unsigned int, unsigned int);
+extern int nvhost_get_irq(struct nvhost_device *, unsigned int);
+extern struct resource *nvhost_get_resource_byname(struct nvhost_device *,
+		unsigned int, const char *);
+extern int nvhost_get_irq_byname(struct nvhost_device *, const char *);
+
+#define to_nvhost_device(x) container_of((x), struct nvhost_device, dev)
+#define to_nvhost_driver(drv)	(container_of((drv), struct nvhost_driver, \
+				 driver))
+
+#define nvhost_get_drvdata(_dev) dev_get_drvdata(&(_dev)->dev)
+#define nvhost_set_drvdata(_dev, data) dev_set_drvdata(&(_dev)->dev, (data))
+
+int nvhost_bus_register(struct nvhost_master *host);
+
+#endif
diff --git a/include/linux/nvhost_ioctl.h b/include/linux/nvhost_ioctl.h
new file mode 100644
index 000000000000..ef6685ea418f
--- /dev/null
+++ b/include/linux/nvhost_ioctl.h
@@ -0,0 +1,187 @@
+/*
+ * include/linux/nvhost_ioctl.h
+ *
+ * Tegra graphics host driver
+ *
+ * Copyright (c) 2009-2011, NVIDIA Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ */
+
+#ifndef __LINUX_NVHOST_IOCTL_H
+#define __LINUX_NVHOST_IOCTL_H
+
+#include <linux/ioctl.h>
+#include <linux/types.h>
+
+#if !defined(__KERNEL__)
+#define __user
+#endif
+
+#define NVHOST_INVALID_SYNCPOINT 0xFFFFFFFF
+#define NVHOST_NO_TIMEOUT (-1)
+#define NVHOST_NO_CONTEXT 0x0
+#define NVHOST_IOCTL_MAGIC 'H'
+
+/* version 0 header (used with write() submit interface) */
+struct nvhost_submit_hdr {
+	__u32 syncpt_id;
+	__u32 syncpt_incrs;
+	__u32 num_cmdbufs;
+	__u32 num_relocs;
+};
+
+#define NVHOST_SUBMIT_VERSION_V0		0x0
+#define NVHOST_SUBMIT_VERSION_V1		0x1
+#define NVHOST_SUBMIT_VERSION_MAX_SUPPORTED	NVHOST_SUBMIT_VERSION_V1
+
+/* version 1 header (used with ioctl() submit interface) */
+struct nvhost_submit_hdr_ext {
+	__u32 syncpt_id;	/* version 0 fields */
+	__u32 syncpt_incrs;
+	__u32 num_cmdbufs;
+	__u32 num_relocs;
+	__u32 submit_version;	/* version 1 fields */
+	__u32 num_waitchks;
+	__u32 waitchk_mask;
+	__u32 pad[5];		/* future expansion */
+};
+
+struct nvhost_cmdbuf {
+	__u32 mem;
+	__u32 offset;
+	__u32 words;
+};
+
+struct nvhost_reloc {
+	__u32 cmdbuf_mem;
+	__u32 cmdbuf_offset;
+	__u32 target;
+	__u32 target_offset;
+};
+
+struct nvhost_waitchk {
+	__u32 mem;
+	__u32 offset;
+	__u32 syncpt_id;
+	__u32 thresh;
+};
+
+struct nvhost_get_param_args {
+	__u32 value;
+};
+
+struct nvhost_set_nvmap_fd_args {
+	__u32 fd;
+};
+
+struct nvhost_read_3d_reg_args {
+	__u32 offset;
+	__u32 value;
+};
+
+struct nvhost_clk_rate_args {
+	__u64 rate;
+};
+
+struct nvhost_set_timeout_args {
+	__u32 timeout;
+};
+
+#define NVHOST_IOCTL_CHANNEL_FLUSH		\
+	_IOR(NVHOST_IOCTL_MAGIC, 1, struct nvhost_get_param_args)
+#define NVHOST_IOCTL_CHANNEL_GET_SYNCPOINTS	\
+	_IOR(NVHOST_IOCTL_MAGIC, 2, struct nvhost_get_param_args)
+#define NVHOST_IOCTL_CHANNEL_GET_WAITBASES	\
+	_IOR(NVHOST_IOCTL_MAGIC, 3, struct nvhost_get_param_args)
+#define NVHOST_IOCTL_CHANNEL_GET_MODMUTEXES	\
+	_IOR(NVHOST_IOCTL_MAGIC, 4, struct nvhost_get_param_args)
+#define NVHOST_IOCTL_CHANNEL_SET_NVMAP_FD	\
+	_IOW(NVHOST_IOCTL_MAGIC, 5, struct nvhost_set_nvmap_fd_args)
+#define NVHOST_IOCTL_CHANNEL_NULL_KICKOFF	\
+	_IOR(NVHOST_IOCTL_MAGIC, 6, struct nvhost_get_param_args)
+#define NVHOST_IOCTL_CHANNEL_SUBMIT_EXT		\
+	_IOW(NVHOST_IOCTL_MAGIC, 7, struct nvhost_submit_hdr_ext)
+#define NVHOST_IOCTL_CHANNEL_READ_3D_REG \
+	_IOWR(NVHOST_IOCTL_MAGIC, 8, struct nvhost_read_3d_reg_args)
+#define NVHOST_IOCTL_CHANNEL_GET_CLK_RATE		\
+	_IOR(NVHOST_IOCTL_MAGIC, 9, struct nvhost_clk_rate_args)
+#define NVHOST_IOCTL_CHANNEL_SET_CLK_RATE		\
+	_IOW(NVHOST_IOCTL_MAGIC, 10, struct nvhost_clk_rate_args)
+#define NVHOST_IOCTL_CHANNEL_SET_TIMEOUT	\
+	_IOW(NVHOST_IOCTL_MAGIC, 11, struct nvhost_set_timeout_args)
+#define NVHOST_IOCTL_CHANNEL_GET_TIMEDOUT	\
+	_IOR(NVHOST_IOCTL_MAGIC, 12, struct nvhost_get_param_args)
+#define NVHOST_IOCTL_CHANNEL_LAST		\
+	_IOC_NR(NVHOST_IOCTL_CHANNEL_GET_TIMEDOUT)
+#define NVHOST_IOCTL_CHANNEL_MAX_ARG_SIZE sizeof(struct nvhost_submit_hdr_ext)
+
+struct nvhost_ctrl_syncpt_read_args {
+	__u32 id;
+	__u32 value;
+};
+
+struct nvhost_ctrl_syncpt_incr_args {
+	__u32 id;
+};
+
+struct nvhost_ctrl_syncpt_wait_args {
+	__u32 id;
+	__u32 thresh;
+	__s32 timeout;
+};
+
+struct nvhost_ctrl_syncpt_waitex_args {
+	__u32 id;
+	__u32 thresh;
+	__s32 timeout;
+	__u32 value;
+};
+
+struct nvhost_ctrl_module_mutex_args {
+	__u32 id;
+	__u32 lock;
+};
+
+struct nvhost_ctrl_module_regrdwr_args {
+	__u32 id;
+	__u32 num_offsets;
+	__u32 block_size;
+	__u32 *offsets;
+	__u32 *values;
+	__u32 write;
+};
+
+#define NVHOST_IOCTL_CTRL_SYNCPT_READ		\
+	_IOWR(NVHOST_IOCTL_MAGIC, 1, struct nvhost_ctrl_syncpt_read_args)
+#define NVHOST_IOCTL_CTRL_SYNCPT_INCR		\
+	_IOW(NVHOST_IOCTL_MAGIC, 2, struct nvhost_ctrl_syncpt_incr_args)
+#define NVHOST_IOCTL_CTRL_SYNCPT_WAIT		\
+	_IOW(NVHOST_IOCTL_MAGIC, 3, struct nvhost_ctrl_syncpt_wait_args)
+
+#define NVHOST_IOCTL_CTRL_MODULE_MUTEX		\
+	_IOWR(NVHOST_IOCTL_MAGIC, 4, struct nvhost_ctrl_module_mutex_args)
+#define NVHOST_IOCTL_CTRL_MODULE_REGRDWR	\
+	_IOWR(NVHOST_IOCTL_MAGIC, 5, struct nvhost_ctrl_module_regrdwr_args)
+
+#define NVHOST_IOCTL_CTRL_SYNCPT_WAITEX		\
+	_IOWR(NVHOST_IOCTL_MAGIC, 6, struct nvhost_ctrl_syncpt_waitex_args)
+
+#define NVHOST_IOCTL_CTRL_LAST			\
+	_IOC_NR(NVHOST_IOCTL_CTRL_SYNCPT_WAITEX)
+#define NVHOST_IOCTL_CTRL_MAX_ARG_SIZE	\
+	sizeof(struct nvhost_ctrl_module_regrdwr_args)
+
+#endif
diff --git a/include/linux/regulator/consumer.h b/include/linux/regulator/consumer.h
index 9e87c1cb7270..fd76b6029f09 100644
--- a/include/linux/regulator/consumer.h
+++ b/include/linux/regulator/consumer.h
@@ -92,6 +92,10 @@
  * FORCE_DISABLE  Regulator forcibly shut down by software.
  * VOLTAGE_CHANGE Regulator voltage changed.
  * DISABLE        Regulator was disabled.
+ * PRE_ENABLE     Regulator is to be enabled
+ * POST_ENABLE    Regulator was enabled
+ * OUT_PRECHANGE  Regulator is enabled and its voltage is to be changed
+ * OUT_POSTCHANGE Regulator is enabled and its voltage was changed
  *
  * NOTE: These events can be OR'ed together when passed into handler.
  */
@@ -104,6 +108,10 @@
 #define REGULATOR_EVENT_FORCE_DISABLE		0x20
 #define REGULATOR_EVENT_VOLTAGE_CHANGE		0x40
 #define REGULATOR_EVENT_DISABLE 		0x80
+#define REGULATOR_EVENT_PRE_ENABLE		0x100
+#define REGULATOR_EVENT_POST_ENABLE		0x200
+#define REGULATOR_EVENT_OUT_PRECHANGE		0x400
+#define REGULATOR_EVENT_OUT_POSTCHANGE		0x800
 
 struct regulator;
 
diff --git a/include/linux/regulator/max77663-regulator.h b/include/linux/regulator/max77663-regulator.h
new file mode 100644
index 000000000000..470248d20631
--- /dev/null
+++ b/include/linux/regulator/max77663-regulator.h
@@ -0,0 +1,122 @@
+/*
+ * include/linux/regulator/max77663-regulator.h
+ * Maxim LDO and Buck regulators driver
+ *
+ * Copyright 2011 Maxim Integrated Products, Inc.
+ * Copyright (C) 2011 NVIDIA Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ */
+
+#ifndef __LINUX_REGULATOR_MAX77663_REGULATOR_H__
+#define __LINUX_REGULATOR_MAX77663_REGULATOR_H__
+
+#include <linux/regulator/machine.h>
+
+#define max77663_rails(_name)	"max77663_"#_name
+
+enum max77663_regulator_id {
+	MAX77663_REGULATOR_ID_SD0,
+	MAX77663_REGULATOR_ID_DVSSD0,
+	MAX77663_REGULATOR_ID_SD1,
+	MAX77663_REGULATOR_ID_DVSSD1,
+	MAX77663_REGULATOR_ID_SD2,
+	MAX77663_REGULATOR_ID_SD3,
+	MAX77663_REGULATOR_ID_SD4,
+	MAX77663_REGULATOR_ID_LDO0,
+	MAX77663_REGULATOR_ID_LDO1,
+	MAX77663_REGULATOR_ID_LDO2,
+	MAX77663_REGULATOR_ID_LDO3,
+	MAX77663_REGULATOR_ID_LDO4,
+	MAX77663_REGULATOR_ID_LDO5,
+	MAX77663_REGULATOR_ID_LDO6,
+	MAX77663_REGULATOR_ID_LDO7,
+	MAX77663_REGULATOR_ID_LDO8,
+	MAX77663_REGULATOR_ID_NR,
+};
+
+/* FPS Power Up/Down Period */
+enum max77663_regulator_fps_power_period {
+	FPS_POWER_PERIOD_0,
+	FPS_POWER_PERIOD_1,
+	FPS_POWER_PERIOD_2,
+	FPS_POWER_PERIOD_3,
+	FPS_POWER_PERIOD_4,
+	FPS_POWER_PERIOD_5,
+	FPS_POWER_PERIOD_6,
+	FPS_POWER_PERIOD_7,
+	FPS_POWER_PERIOD_DEF = -1,
+};
+
+/* FPS Time Period */
+enum max77663_regulator_fps_time_period {
+	FPS_TIME_PERIOD_20US,
+	FPS_TIME_PERIOD_40US,
+	FPS_TIME_PERIOD_80US,
+	FPS_TIME_PERIOD_160US,
+	FPS_TIME_PERIOD_320US,
+	FPS_TIME_PERIOD_640US,
+	FPS_TIME_PERIOD_1280US,
+	FPS_TIME_PERIOD_2560US,
+	FPS_TIME_PERIOD_DEF = -1,
+};
+
+/* FPS Enable Source */
+enum max77663_regulator_fps_en_src {
+	FPS_EN_SRC_EN0,
+	FPS_EN_SRC_EN1,
+	FPS_EN_SRC_SW,
+	FPS_EN_SRC_RSVD,
+};
+
+/* FPS Source */
+enum max77663_regulator_fps_src {
+	FPS_SRC_0,
+	FPS_SRC_1,
+	FPS_SRC_2,
+	FPS_SRC_NONE,
+	FPS_SRC_DEF = -1,
+};
+
+/*
+ * Flags
+ */
+/* SD0 is controlled by EN2 */
+#define EN2_CTRL_SD0		0x01
+
+/* SD Slew Rate */
+#define SD_SLEW_RATE_SLOWEST	0x02	/*  13.75mV/us */
+#define SD_SLEW_RATE_SLOW	0x04	/*  27.50mV/us */
+#define SD_SLEW_RATE_FAST	0x08	/*  55.00mV/us */
+#define SD_SLEW_RATE_FASTEST	0x10	/* 100.00mV/us */
+#define SD_SLEW_RATE_MASK	0x1E
+
+/* SD Forced PWM Mode */
+#define SD_FORCED_PWM_MODE	0x20
+
+struct max77663_regulator_fps_cfg {
+	enum max77663_regulator_fps_src src;
+	enum max77663_regulator_fps_en_src en_src;
+	enum max77663_regulator_fps_time_period time_period;
+};
+
+struct max77663_regulator_platform_data {
+	struct regulator_init_data init_data;
+	bool init_apply;
+	bool init_enable;
+	int init_uV;
+	enum max77663_regulator_fps_src fps_src;
+	enum max77663_regulator_fps_power_period fps_pu_period;
+	enum max77663_regulator_fps_power_period fps_pd_period;
+
+	int num_fps_cfgs;
+	struct max77663_regulator_fps_cfg *fps_cfgs;
+
+	unsigned int flags;
+};
+
+#endif /* __LINUX_REGULATOR_MAX77663_REGULATOR_H__ */
diff --git a/include/linux/regulator/ricoh583-regulator.h b/include/linux/regulator/ricoh583-regulator.h
new file mode 100644
index 000000000000..d932f7094459
--- /dev/null
+++ b/include/linux/regulator/ricoh583-regulator.h
@@ -0,0 +1,60 @@
+/*
+ * linux/regulator/ricoh583-regulator.h
+ *
+ * Interface for regulator driver for RICOH583 power management chip.
+ *
+ * Copyright (C) 2011 NVIDIA Corporation
+ *
+ * Copyright (C) 2011 RICOH COMPANY,LTD
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ *
+ */
+
+#ifndef __LINUX_REGULATOR_RICOH583_H
+#define __LINUX_REGULATOR_RICOH583_H
+
+#include <linux/regulator/machine.h>
+
+
+#define ricoh583_rails(_name) "RICOH583_"#_name
+
+/* RICHOH Regulator IDs */
+enum regulator_id {
+	RICOH583_ID_DC0,
+	RICOH583_ID_DC1,
+	RICOH583_ID_DC2,
+	RICOH583_ID_DC3,
+	RICOH583_ID_LDO0,
+	RICOH583_ID_LDO1,
+	RICOH583_ID_LDO2,
+	RICOH583_ID_LDO3,
+	RICOH583_ID_LDO4,
+	RICOH583_ID_LDO5,
+	RICOH583_ID_LDO6,
+	RICOH583_ID_LDO7,
+	RICOH583_ID_LDO8,
+	RICOH583_ID_LDO9,
+};
+
+struct ricoh583_regulator_platform_data {
+		struct regulator_init_data regulator;
+		int init_uV;
+		unsigned init_enable:1;
+		unsigned init_apply:1;
+		int deepsleep_uV;
+};
+
+#endif
diff --git a/include/linux/regulator/tps6591x-regulator.h b/include/linux/regulator/tps6591x-regulator.h
index 8d2801bbcf17..150d17707fcb 100644
--- a/include/linux/regulator/tps6591x-regulator.h
+++ b/include/linux/regulator/tps6591x-regulator.h
@@ -26,6 +26,23 @@
 
 #include <linux/regulator/machine.h>
 
+#define tps6591x_rails(_name) "tps6591x_"#_name
+
+enum {
+	TPS6591X_ID_VIO,
+	TPS6591X_ID_VDD_1,
+	TPS6591X_ID_VDD_2,
+	TPS6591X_ID_VDDCTRL,
+	TPS6591X_ID_LDO_1,
+	TPS6591X_ID_LDO_2,
+	TPS6591X_ID_LDO_3,
+	TPS6591X_ID_LDO_4,
+	TPS6591X_ID_LDO_5,
+	TPS6591X_ID_LDO_6,
+	TPS6591X_ID_LDO_7,
+	TPS6591X_ID_LDO_8,
+};
+
 enum tps6591x_ext_control {
 	EXT_CTRL_NONE = 0x0,
 	EXT_CTRL_EN1,
diff --git a/include/linux/regulator/tps80031-regulator.h b/include/linux/regulator/tps80031-regulator.h
index 92787df097ce..ed0838a6c3bc 100644
--- a/include/linux/regulator/tps80031-regulator.h
+++ b/include/linux/regulator/tps80031-regulator.h
@@ -26,6 +26,29 @@
 
 #include <linux/regulator/machine.h>
 
+#define tps80031_rails(_name) "tps80031_"#_name
+
+enum {
+	TPS80031_ID_VIO,
+	TPS80031_ID_SMPS1,
+	TPS80031_ID_SMPS2,
+	TPS80031_ID_SMPS3,
+	TPS80031_ID_SMPS4,
+	TPS80031_ID_VANA,
+	TPS80031_ID_LDO1,
+	TPS80031_ID_LDO2,
+	TPS80031_ID_LDO3,
+	TPS80031_ID_LDO4,
+	TPS80031_ID_LDO5,
+	TPS80031_ID_LDO6,
+	TPS80031_ID_LDO7,
+	TPS80031_ID_LDOLN,
+	TPS80031_ID_LDOUSB,
+	TPS80031_ID_VBUS,
+	TPS80031_ID_CHARGER,
+};
+
+
 enum {
 	/* USBLDO input selection */
 	USBLDO_INPUT_VSYS	= 0x00000001,
@@ -52,7 +75,7 @@ enum {
  * @init_enable: Enable or do not enable the rails during initialization.
  * @init_apply: Init parameter applied or not.
  * @flags: Configuration flag to configure the rails. It should be ORed of
- *         above enums.
+ *	 above enums.
  */
 
 struct tps80031_regulator_platform_data {
diff --git a/include/linux/spi-tegra.h b/include/linux/spi-tegra.h
index 3e0d26d51c50..380965005516 100644
--- a/include/linux/spi-tegra.h
+++ b/include/linux/spi-tegra.h
@@ -21,10 +21,21 @@
 #ifndef _LINUX_SPI_TEGRA_H
 #define _LINUX_SPI_TEGRA_H
 
+#include <linux/clk.h>
+
+struct spi_clk_parent {
+	const char *name;
+	struct clk *parent_clk;
+	unsigned long fixed_clk_rate;
+};
+
 struct tegra_spi_platform_data {
 	bool is_dma_based;
 	int max_dma_buffer;
 	bool is_clkon_always;
+	unsigned int max_rate;
+	struct spi_clk_parent *parent_clk_list;
+	int  parent_clk_count;
 };
 
 /* Controller data from device to pass some info like
diff --git a/include/linux/tegra_nvavp.h b/include/linux/tegra_nvavp.h
new file mode 100644
index 000000000000..c468014a8b9f
--- /dev/null
+++ b/include/linux/tegra_nvavp.h
@@ -0,0 +1,63 @@
+/*
+ * include/linux/tegra_nvavp.h
+ *
+ * Copyright (C) 2011 NVIDIA Corp.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#ifndef __LINUX_TEGRA_NVAVP_H
+#define __LINUX_TEGRA_NVAVP_H
+
+#include <linux/ioctl.h>
+#include <linux/types.h>
+
+#define NVAVP_MAX_RELOCATION_COUNT 64
+
+/* avp submit flags */
+#define NVAVP_FLAG_NONE		0x00000000
+#define NVAVP_UCODE_EXT		0x00000001 /*use external ucode provided */
+
+struct nvavp_cmdbuf {
+	__u32 mem;
+	__u32 offset;
+	__u32 words;
+};
+
+struct nvavp_reloc {
+	__u32 cmdbuf_mem;
+	__u32 cmdbuf_offset;
+	__u32 target;
+	__u32 target_offset;
+};
+
+struct nvavp_syncpt {
+	__u32 id;
+	__u32 value;
+};
+
+struct nvavp_pushbuffer_submit_hdr {
+	struct nvavp_cmdbuf	cmdbuf;
+	struct nvavp_reloc	*relocs;
+	__u32			num_relocs;
+	struct nvavp_syncpt	*syncpt;
+	__u32			flags;
+};
+
+struct nvavp_set_nvmap_fd_args {
+	__u32 fd;
+};
+
+#define NVAVP_IOCTL_MAGIC		'n'
+
+#define NVAVP_IOCTL_SET_NVMAP_FD	_IOW(NVAVP_IOCTL_MAGIC, 0x60, \
+					struct nvavp_set_nvmap_fd_args)
+#define NVAVP_IOCTL_PUSH_BUFFER_SUBMIT	_IOWR(NVAVP_IOCTL_MAGIC, 0x63, \
+					struct nvavp_pushbuffer_submit_hdr)
+
+#define NVAVP_IOCTL_MIN_NR		_IOC_NR(NVAVP_IOCTL_SET_NVMAP_FD)
+#define NVAVP_IOCTL_MAX_NR		_IOC_NR(NVAVP_IOCTL_PUSH_BUFFER_SUBMIT)
+
+#endif /* __LINUX_TEGRA_NVAVP_H */
diff --git a/include/linux/tegra_overlay.h b/include/linux/tegra_overlay.h
index 94d486b353b2..2a6025afdad7 100644
--- a/include/linux/tegra_overlay.h
+++ b/include/linux/tegra_overlay.h
@@ -20,6 +20,14 @@
 #include <linux/types.h>
 #include <video/tegrafb.h>
 
+#define TEGRA_FB_WIN_BLEND_NONE		0
+#define TEGRA_FB_WIN_BLEND_PREMULT	1
+#define TEGRA_FB_WIN_BLEND_COVERAGE	2
+
+#define TEGRA_FB_WIN_FLAG_INVERT_H	(1 << 0)
+#define TEGRA_FB_WIN_FLAG_INVERT_V	(1 << 1)
+#define TEGRA_FB_WIN_FLAG_TILED		(1 << 2)
+
 /* set index to -1 to ignore window data */
 struct tegra_overlay_windowattr {
 	__s32	index;
@@ -49,6 +57,7 @@ struct tegra_overlay_windowattr {
 };
 
 #define TEGRA_OVERLAY_FLIP_FLAG_BLEND_REORDER (1 << 0)
+#define TEGRA_FB_FLIP_N_WINDOWS			3
 
 struct tegra_overlay_flip_args {
 	struct tegra_overlay_windowattr win[TEGRA_FB_FLIP_N_WINDOWS];
diff --git a/include/linux/tegra_pwm_bl.h b/include/linux/tegra_pwm_bl.h
index 4eac77b04203..68fecb522cfc 100644
--- a/include/linux/tegra_pwm_bl.h
+++ b/include/linux/tegra_pwm_bl.h
@@ -15,11 +15,14 @@
 struct platform_tegra_pwm_backlight_data {
 	int which_dc;
 	int which_pwm;
+	void (*switch_to_sfio)(int);
+	int gpio_conf_to_sfio;
 	unsigned int dft_brightness;
 	unsigned int max_brightness;
 	unsigned int period;
 	unsigned int clk_div;
 	unsigned int clk_select;
+	int (*notify)(struct device *dev, int brightness);
 };
 
 #endif /* TERGA_PWM_BL_H */
diff --git a/include/linux/tracelevel.h b/include/linux/tracelevel.h
new file mode 100644
index 000000000000..ac3351c6ed85
--- /dev/null
+++ b/include/linux/tracelevel.h
@@ -0,0 +1,42 @@
+/*
+ * include/linux/tracelevel.c
+ *
+ * Copyright (c) 2011, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ */
+
+#ifndef _TRACELEVEL_H
+#define _TRACELEVEL_H
+
+/* tracelevel allows a subsystem author to add priorities to
+ * trace_events. For usage details, see tracelevel.txt.
+ */
+
+#define TRACELEVEL_ERR 3
+#define TRACELEVEL_WARN 2
+#define TRACELEVEL_INFO 1
+#define TRACELEVEL_DEBUG 0
+
+#define TRACELEVEL_MAX TRACELEVEL_ERR
+#define TRACELEVEL_DEFAULT TRACELEVEL_ERR
+
+int __tracelevel_register(char *name, unsigned int level);
+int tracelevel_set_level(int level);
+
+#define tracelevel_register(name, level)	\
+	__tracelevel_register(#name, level)
+
+#endif /* _TRACELEVEL_H */
diff --git a/include/media/ar0832_main.h b/include/media/ar0832_main.h
index 436fb9f7de92..6cf45585fd1d 100644
--- a/include/media/ar0832_main.h
+++ b/include/media/ar0832_main.h
@@ -13,18 +13,18 @@
 
 #include <linux/ioctl.h> /* For IOCTL macros */
 
-#define AR0832_IOCTL_SET_MODE			_IOW('o', 1, struct ar0832_mode)
-#define AR0832_IOCTL_SET_FRAME_LENGTH		_IOW('o', 2, __u32)
-#define AR0832_IOCTL_SET_COARSE_TIME		_IOW('o', 3, __u32)
-#define AR0832_IOCTL_SET_GAIN			_IOW('o', 4, __u16)
-#define AR0832_IOCTL_GET_STATUS			_IOR('o', 5, __u8)
-#define AR0832_IOCTL_GET_OTP			_IOR('o', 6, struct ar0832_otp_data)
-#define AR0832_IOCTL_TEST_PATTERN		_IOW('o', 7, enum ar0832_test_pattern)
-#define AR0832_IOCTL_SET_POWER_ON		_IOW('o', 10, __u32)
-#define AR0832_IOCTL_SET_SENSOR_REGION		_IOW('o', 11, struct ar0832_stereo_region)
-
-#define AR0832_FOCUSER_IOCTL_GET_CONFIG		_IOR('o', 12, struct ar0832_focuser_config)
-#define AR0832_FOCUSER_IOCTL_SET_POSITION	_IOW('o', 13, __u32)
+#define AR0832_IOCTL_SET_MODE			_IOW('o', 0x01, struct ar0832_mode)
+#define AR0832_IOCTL_SET_FRAME_LENGTH		_IOW('o', 0x02, __u32)
+#define AR0832_IOCTL_SET_COARSE_TIME		_IOW('o', 0x03, __u32)
+#define AR0832_IOCTL_SET_GAIN			_IOW('o', 0x04, __u16)
+#define AR0832_IOCTL_GET_STATUS			_IOR('o', 0x05, __u8)
+#define AR0832_IOCTL_GET_OTP			_IOR('o', 0x06, struct ar0832_otp_data)
+#define AR0832_IOCTL_TEST_PATTERN		_IOW('o', 0x07, enum ar0832_test_pattern)
+#define AR0832_IOCTL_SET_POWER_ON		_IOW('o', 0x08, struct ar0832_mode)
+#define AR0832_IOCTL_SET_SENSOR_REGION		_IOW('o', 0x09, struct ar0832_stereo_region)
+
+#define AR0832_FOCUSER_IOCTL_GET_CONFIG		_IOR('o', 0x10, struct ar0832_focuser_config)
+#define AR0832_FOCUSER_IOCTL_SET_POSITION	_IOW('o', 0x11, __u32)
 
 enum ar0832_test_pattern {
 	TEST_PATTERN_NONE,
@@ -61,6 +61,7 @@ struct ar0832_mode {
 	__u32 frame_length;
 	__u32 coarse_time;
 	__u16 gain;
+	int stereo;
 };
 
 struct ar0832_point{
@@ -84,19 +85,16 @@ struct ar0832_focuser_config {
 	__u32 actuator_range;
 	__u32 pos_low;
 	__u32 pos_high;
-	/* To-Do */
-	/*
-	float focal_length;
-	float fnumber;
-	float max_aperture;
-	*/
+	__u32 focal_length;
+	__u32 fnumber;
+	__u32 max_aperture;
 };
 
 #ifdef __KERNEL__
 struct ar0832_platform_data {
-	int (*power_on)(void);
-	int (*power_off)(void);
-
+	int (*power_on)(int is_stereo);
+	int (*power_off)(int is_stereo);
+	char *id;
 };
 #endif /* __KERNEL__ */
 
diff --git a/include/media/ov5650.h b/include/media/ov5650.h
index 4a5f5baa5b43..00efcec61a5f 100644
--- a/include/media/ov5650.h
+++ b/include/media/ov5650.h
@@ -27,10 +27,36 @@
 #define OV5650_IOCTL_SET_COARSE_TIME	_IOW('o', 3, __u32)
 #define OV5650_IOCTL_SET_GAIN			_IOW('o', 4, __u16)
 #define OV5650_IOCTL_GET_STATUS			_IOR('o', 5, __u8)
+#define OV5650_IOCTL_SET_BINNING    	_IOW('o', 6, __u8)
 #define OV5650_IOCTL_TEST_PATTERN		_IOW('o', 7, enum ov5650_test_pattern)
 #define OV5650_IOCTL_SET_CAMERA_MODE	_IOW('o', 10, __u32)
 #define OV5650_IOCTL_SYNC_SENSORS		_IOW('o', 11, __u32)
 
+/* OV5650 registers */
+#define OV5650_SRM_GRUP_ACCESS          (0x3212)
+#define OV5650_ARRAY_CONTROL_01         (0x3621)
+#define OV5650_ANALOG_CONTROL_D         (0x370D)
+#define OV5650_TIMING_TC_REG_18         (0x3818)
+#define OV5650_TIMING_CONTROL_HS_HIGH   (0x3800)
+#define OV5650_TIMING_CONTROL_HS_LOW    (0x3801)
+#define OV5650_TIMING_CONTROL_VS_HIGH   (0x3802)
+#define OV5650_TIMING_CONTROL_VS_LOW    (0x3803)
+#define OV5650_TIMING_HW_HIGH           (0x3804)
+#define OV5650_TIMING_HW_LOW            (0x3805)
+#define OV5650_TIMING_VH_HIGH           (0x3806)
+#define OV5650_TIMING_VH_LOW            (0x3807)
+#define OV5650_TIMING_TC_REG_18         (0x3818)
+#define OV5650_TIMING_HREFST_MAN_HIGH   (0x3824)
+#define OV5650_TIMING_HREFST_MAN_LOW    (0x3825)
+#define OV5650_H_BINNING_BIT            (1 << 7)
+#define OV5650_H_SUBSAMPLING_BIT        (1 << 6)
+#define OV5650_V_BINNING_BIT            (1 << 6)
+#define OV5650_V_SUBSAMPLING_BIT        (1 << 0)
+#define OV5650_GROUP_HOLD_BIT		(1 << 7)
+#define OV5650_GROUP_LAUNCH_BIT		(1 << 5)
+#define OV5650_GROUP_HOLD_END_BIT	(1 << 4)
+#define OV5650_GROUP_ID(id)		(id)
+
 enum ov5650_test_pattern {
 	TEST_PATTERN_NONE,
 	TEST_PATTERN_COLORBARS,
@@ -44,6 +70,7 @@ struct ov5650_mode {
 	__u32 coarse_time;
 	__u16 gain;
 };
+
 #ifdef __KERNEL__
 struct ov5650_platform_data {
 	int (*power_on)(void);
diff --git a/include/media/ov9726.h b/include/media/ov9726.h
new file mode 100644
index 000000000000..34678fb0708f
--- /dev/null
+++ b/include/media/ov9726.h
@@ -0,0 +1,68 @@
+/*
+* ov9726.h
+*
+* Copyright (c) 2011, NVIDIA, All Rights Reserved.
+*
+* This file is licensed under the terms of the GNU General Public License
+* version 2. This program is licensed "as is" without any warranty of any
+* kind, whether express or implied.
+*/
+
+#ifndef __OV9726_H__
+#define __OV9726_H__
+
+#include <linux/ioctl.h>
+
+#define OV9726_I2C_ADDR			0x20
+
+#define OV9726_IOCTL_SET_MODE		_IOW('o', 1, struct ov9726_cust_mode)
+#define OV9726_IOCTL_SET_FRAME_LENGTH	_IOW('o', 2, __u32)
+#define OV9726_IOCTL_SET_COARSE_TIME	_IOW('o', 3, __u32)
+#define OV9726_IOCTL_SET_GAIN		_IOW('o', 4, __u16)
+#define OV9726_IOCTL_GET_STATUS		_IOR('o', 5, __u8)
+
+struct ov9726_mode {
+	int	mode_id;
+	int	xres;
+	int	yres;
+	__u32	frame_length;
+	__u32	coarse_time;
+	__u16	gain;
+};
+
+struct ov9726_reg {
+	__u16	addr;
+	__u16	val;
+};
+
+struct ov9726_cust_mode {
+	struct ov9726_mode	mode;
+	__u16			reg_num;
+	struct ov9726_reg	*reg_seq;
+};
+
+#define OV9726_TABLE_WAIT_MS		0
+#define OV9726_TABLE_END		1
+
+#ifdef __KERNEL__
+#define OV9726_REG_FRAME_LENGTH_HI	0x340
+#define OV9726_REG_FRAME_LENGTH_LO	0x341
+#define OV9726_REG_COARSE_TIME_HI	0x202
+#define OV9726_REG_COARSE_TIME_LO	0x203
+#define OV9726_REG_GAIN_HI		0x204
+#define OV9726_REG_GAIN_LO		0x205
+
+#define OV9726_MAX_RETRIES		3
+
+struct ov9726_platform_data {
+	int	(*power_on)(void);
+	int	(*power_off)(void);
+	unsigned    gpio_rst;
+	bool        rst_low_active;
+	unsigned    gpio_pwdn;
+	bool        pwdn_low_active;
+};
+#endif /* __KERNEL__ */
+
+#endif  /* __OV9726_H__ */
+
diff --git a/include/media/sh532u.h b/include/media/sh532u.h
index 5c4ffd9d42f8..166caad65f88 100644
--- a/include/media/sh532u.h
+++ b/include/media/sh532u.h
@@ -24,6 +24,7 @@
 #define SH532U_IOCTL_GET_CONFIG		_IOR('o', 1, struct sh532u_config)
 #define SH532U_IOCTL_SET_POSITION	_IOW('o', 2, u32)
 #define SH532U_IOCTL_GET_MOVE_STATUS	_IOW('o', 3, unsigned char)
+#define SH532U_IOCTL_SET_CAMERA_MODE	_IOW('o', 4, unsigned char)
 
 enum sh532u_move_status {
 	SH532U_STATE_UNKNOWN = 1,
diff --git a/include/media/tegra_camera.h b/include/media/tegra_camera.h
index 3c8ddcab26e3..f88d376e6769 100644
--- a/include/media/tegra_camera.h
+++ b/include/media/tegra_camera.h
@@ -13,7 +13,8 @@
  * GNU General Public License for more details.
  *
  */
-
+#ifndef TEGRA_CAMERA_H
+#define TEGRA_CAMERA_H
 enum {
 	TEGRA_CAMERA_MODULE_ISP = 0,
 	TEGRA_CAMERA_MODULE_VI,
@@ -31,8 +32,19 @@ struct tegra_camera_clk_info {
 	unsigned long rate;
 };
 
+enum StereoCameraMode {
+	Main = 0x0,		/* Sets the default camera to Main */
+	StereoCameraMode_Left = 0x01,	/* the left camera is on. */
+	StereoCameraMode_Right = 0x02,	/* the right camera is on. */
+	StereoCameraMode_Stereo = 0x03,	/* both cameras are on. */
+	StereoCameraMode_Force32 = 0x7FFFFFFF
+};
+
+
 #define TEGRA_CAMERA_IOCTL_ENABLE		_IOWR('i', 1, uint)
 #define TEGRA_CAMERA_IOCTL_DISABLE		_IOWR('i', 2, uint)
 #define TEGRA_CAMERA_IOCTL_CLK_SET_RATE		\
 	_IOWR('i', 3, struct tegra_camera_clk_info)
 #define TEGRA_CAMERA_IOCTL_RESET		_IOWR('i', 4, uint)
+
+#endif
diff --git a/include/trace/events/nvhost.h b/include/trace/events/nvhost.h
new file mode 100644
index 000000000000..2a1845950ed5
--- /dev/null
+++ b/include/trace/events/nvhost.h
@@ -0,0 +1,350 @@
+/*
+ * include/trace/events/nvhost.h
+ *
+ * Nvhost event logging to ftrace.
+ *
+ * Copyright (c) 2010-2011, NVIDIA Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ */
+
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM nvhost
+
+#if !defined(_TRACE_NVHOST_H) || defined(TRACE_HEADER_MULTI_READ)
+#define _TRACE_NVHOST_H
+
+#include <linux/ktime.h>
+#include <linux/tracepoint.h>
+
+DECLARE_EVENT_CLASS(nvhost,
+	TP_PROTO(const char *name),
+	TP_ARGS(name),
+	TP_STRUCT__entry(__field(const char *, name)),
+	TP_fast_assign(__entry->name = name;),
+	TP_printk("name=%s", __entry->name)
+);
+
+DEFINE_EVENT(nvhost, nvhost_channel_open,
+	TP_PROTO(const char *name),
+	TP_ARGS(name)
+);
+
+DEFINE_EVENT(nvhost, nvhost_channel_release,
+	TP_PROTO(const char *name),
+	TP_ARGS(name)
+);
+
+DEFINE_EVENT(nvhost, nvhost_ioctl_channel_flush,
+	TP_PROTO(const char *name),
+	TP_ARGS(name)
+);
+
+TRACE_EVENT(nvhost_channel_write_submit,
+	TP_PROTO(const char *name, ssize_t count, u32 cmdbufs, u32 relocs),
+
+	TP_ARGS(name, count, cmdbufs, relocs),
+
+	TP_STRUCT__entry(
+		__field(const char *, name)
+		__field(ssize_t, count)
+		__field(u32, cmdbufs)
+		__field(u32, relocs)
+	),
+
+	TP_fast_assign(
+		__entry->name = name;
+		__entry->count = count;
+		__entry->cmdbufs = cmdbufs;
+		__entry->relocs = relocs;
+	),
+
+	TP_printk("name=%s, count=%lu, cmdbufs=%lu, relocs=%ld",
+	  __entry->name, (unsigned long)__entry->count,
+	  (unsigned long)__entry->cmdbufs, (unsigned long)__entry->relocs)
+);
+
+TRACE_EVENT(nvhost_ioctl_channel_submit,
+	TP_PROTO(const char *name, u32 version, u32 cmdbufs, u32 relocs,
+		 u32 waitchks),
+
+	TP_ARGS(name, version, cmdbufs, relocs, waitchks),
+
+	TP_STRUCT__entry(
+		__field(const char *, name)
+		__field(u32, version)
+		__field(u32, cmdbufs)
+		__field(u32, relocs)
+		__field(u32, waitchks)
+	),
+
+	TP_fast_assign(
+		__entry->name = name;
+		__entry->version = version;
+		__entry->cmdbufs = cmdbufs;
+		__entry->relocs = relocs;
+		__entry->waitchks = waitchks;
+	),
+
+	TP_printk("name=%s, version=%lu, cmdbufs=%lu, relocs=%ld, waitchks=%ld",
+	  __entry->name, (unsigned long)__entry->version,
+	  (unsigned long)__entry->cmdbufs, (unsigned long)__entry->relocs,
+	  (unsigned long)__entry->waitchks)
+);
+
+TRACE_EVENT(nvhost_channel_write_cmdbuf,
+	TP_PROTO(const char *name, u32 mem_id, u32 words, u32 offset),
+
+	TP_ARGS(name, mem_id, words, offset),
+
+	TP_STRUCT__entry(
+		__field(const char *, name)
+		__field(u32, mem_id)
+		__field(u32, words)
+		__field(u32, offset)
+	),
+
+	TP_fast_assign(
+		__entry->name = name;
+		__entry->mem_id = mem_id;
+		__entry->words = words;
+		__entry->offset = offset;
+	),
+
+	TP_printk("name=%s, mem_id=%08lx, words=%lu, offset=%ld",
+	  __entry->name, (unsigned long)__entry->mem_id,
+	  (unsigned long)__entry->words, (unsigned long)__entry->offset)
+);
+
+TRACE_EVENT(nvhost_channel_write_relocs,
+	TP_PROTO(const char *name, u32 relocs),
+
+	TP_ARGS(name, relocs),
+
+	TP_STRUCT__entry(
+		__field(const char *, name)
+		__field(u32, relocs)
+	),
+
+	TP_fast_assign(
+		__entry->name = name;
+		__entry->relocs = relocs;
+	),
+
+	TP_printk("name=%s, relocs=%lu",
+	  __entry->name, (unsigned long)__entry->relocs)
+);
+
+TRACE_EVENT(nvhost_channel_write_waitchks,
+	TP_PROTO(const char *name, u32 waitchks, u32 waitmask),
+
+	TP_ARGS(name, waitchks, waitmask),
+
+	TP_STRUCT__entry(
+		__field(const char *, name)
+		__field(u32, waitchks)
+		__field(u32, waitmask)
+	),
+
+	TP_fast_assign(
+		__entry->name = name;
+		__entry->waitchks = waitchks;
+		__entry->waitmask = waitmask;
+	),
+
+	TP_printk("name=%s, waitchks=%lu, waitmask=%08lx",
+	  __entry->name, (unsigned long)__entry->waitchks,
+	  (unsigned long)__entry->waitmask)
+);
+
+TRACE_EVENT(nvhost_channel_context_switch,
+	TP_PROTO(const char *name, void *old_ctx, void *new_ctx),
+
+	TP_ARGS(name, old_ctx, new_ctx),
+
+	TP_STRUCT__entry(
+	    __field(const char *, name)
+	    __field(void*, old_ctx)
+	    __field(void*, new_ctx)
+	),
+
+	TP_fast_assign(
+	    __entry->name = name;
+	    __entry->old_ctx = old_ctx;
+	    __entry->new_ctx = new_ctx;
+	),
+
+	TP_printk("name=%s, old=%08lx, new=%08lx",
+	  __entry->name, (long unsigned int)__entry->old_ctx,
+	  (long unsigned int)__entry->new_ctx)
+);
+
+TRACE_EVENT(nvhost_ctrlopen,
+	TP_PROTO(const char *name),
+	TP_ARGS(name),
+	TP_STRUCT__entry(
+	    __field(const char *, name)
+	),
+	TP_fast_assign(
+	    __entry->name = name
+	),
+	TP_printk("name=%s", __entry->name)
+);
+
+TRACE_EVENT(nvhost_ctrlrelease,
+	TP_PROTO(const char *name),
+	TP_ARGS(name),
+	TP_STRUCT__entry(
+	    __field(const char *, name)
+	),
+	TP_fast_assign(
+	    __entry->name = name
+	),
+	TP_printk("name=%s", __entry->name)
+);
+
+TRACE_EVENT(nvhost_ioctl_ctrl_module_mutex,
+	TP_PROTO(u32 lock, u32 id),
+
+	TP_ARGS(lock, id),
+
+	TP_STRUCT__entry(
+	    __field(u32, lock);
+	    __field(u32, id);
+	),
+
+	TP_fast_assign(
+		__entry->lock = lock;
+		__entry->id = id;
+	),
+
+	TP_printk("lock=%u, id=%d",
+		__entry->lock, __entry->id)
+	);
+
+TRACE_EVENT(nvhost_ioctl_ctrl_syncpt_incr,
+	TP_PROTO(u32 id),
+
+	TP_ARGS(id),
+
+	TP_STRUCT__entry(
+	    __field(u32, id);
+	),
+
+	TP_fast_assign(
+	   __entry->id = id;
+	),
+
+	TP_printk("id=%d", __entry->id)
+);
+
+TRACE_EVENT(nvhost_ioctl_ctrl_syncpt_read,
+	TP_PROTO(u32 id),
+
+	TP_ARGS(id),
+
+	TP_STRUCT__entry(
+	    __field(u32, id);
+	),
+
+	TP_fast_assign(
+		__entry->id = id;
+	),
+
+	TP_printk("id=%d", __entry->id)
+);
+
+TRACE_EVENT(nvhost_ioctl_ctrl_syncpt_wait,
+	TP_PROTO(u32 id, u32 threshold, s32 timeout),
+
+	TP_ARGS(id, threshold, timeout),
+
+	TP_STRUCT__entry(
+		__field(u32, id)
+		__field(u32, threshold)
+		__field(s32, timeout)
+	),
+
+	TP_fast_assign(
+		__entry->id = id;
+		__entry->threshold = threshold;
+		__entry->timeout = timeout;
+	),
+
+	TP_printk("id=%u, threshold=%u, timeout=%d",
+	  __entry->id, __entry->threshold, __entry->timeout)
+);
+
+TRACE_EVENT(nvhost_channel_submitted,
+	TP_PROTO(const char *name, u32 syncpt_base, u32 syncpt_max),
+
+	TP_ARGS(name, syncpt_base, syncpt_max),
+
+	TP_STRUCT__entry(
+		__field(const char *, name)
+		__field(u32, syncpt_base)
+		__field(u32, syncpt_max)
+	),
+
+	TP_fast_assign(
+		__entry->name = name;
+		__entry->syncpt_base = syncpt_base;
+		__entry->syncpt_max = syncpt_max;
+	),
+
+	TP_printk("name=%s, syncpt_base=%d, syncpt_max=%d",
+		__entry->name, __entry->syncpt_base, __entry->syncpt_max)
+);
+
+TRACE_EVENT(nvhost_channel_submit_complete,
+	TP_PROTO(const char *name, int count),
+
+	TP_ARGS(name, count),
+
+	TP_STRUCT__entry(
+		__field(const char *, name)
+		__field(int, count)
+	),
+
+	TP_fast_assign(
+		__entry->name = name;
+		__entry->count = count;
+	),
+
+	TP_printk("name=%s, count=%d", __entry->name, __entry->count)
+);
+
+TRACE_EVENT(nvhost_wait_cdma,
+	TP_PROTO(const char *name, u32 eventid),
+
+	TP_ARGS(name, eventid),
+
+	TP_STRUCT__entry(
+		__field(const char *, name)
+		__field(u32, eventid)
+	),
+
+	TP_fast_assign(
+		__entry->name = name;
+		__entry->eventid = eventid;
+	),
+
+	TP_printk("name=%s, event=%d", __entry->name, __entry->eventid)
+);
+
+#endif /*  _TRACE_NVHOST_H */
+
+/* This part must be outside protection */
+#include <trace/define_trace.h>
diff --git a/include/video/tegra_dc_ext.h b/include/video/tegra_dc_ext.h
new file mode 100644
index 000000000000..118184849d1b
--- /dev/null
+++ b/include/video/tegra_dc_ext.h
@@ -0,0 +1,259 @@
+/*
+ * Copyright (C) 2011, NVIDIA Corporation
+ *
+ * Author: Robert Morell <rmorell@nvidia.com>
+ * Some code based on fbdev extensions written by:
+ *	Erik Gilling <konkers@android.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#ifndef __TEGRA_DC_EXT_H
+#define __TEGRA_DC_EXT_H
+
+#include <linux/types.h>
+#include <linux/ioctl.h>
+#if defined(__KERNEL__)
+# include <linux/time.h>
+#else
+# include <time.h>
+# include <unistd.h>
+#endif
+
+#define TEGRA_DC_EXT_FMT_P1		0
+#define TEGRA_DC_EXT_FMT_P2		1
+#define TEGRA_DC_EXT_FMT_P4		2
+#define TEGRA_DC_EXT_FMT_P8		3
+#define TEGRA_DC_EXT_FMT_B4G4R4A4	4
+#define TEGRA_DC_EXT_FMT_B5G5R5A	5
+#define TEGRA_DC_EXT_FMT_B5G6R5		6
+#define TEGRA_DC_EXT_FMT_AB5G5R5	7
+#define TEGRA_DC_EXT_FMT_B8G8R8A8	12
+#define TEGRA_DC_EXT_FMT_R8G8B8A8	13
+#define TEGRA_DC_EXT_FMT_B6x2G6x2R6x2A8	14
+#define TEGRA_DC_EXT_FMT_R6x2G6x2B6x2A8	15
+#define TEGRA_DC_EXT_FMT_YCbCr422	16
+#define TEGRA_DC_EXT_FMT_YUV422		17
+#define TEGRA_DC_EXT_FMT_YCbCr420P	18
+#define TEGRA_DC_EXT_FMT_YUV420P	19
+#define TEGRA_DC_EXT_FMT_YCbCr422P	20
+#define TEGRA_DC_EXT_FMT_YUV422P	21
+#define TEGRA_DC_EXT_FMT_YCbCr422R	22
+#define TEGRA_DC_EXT_FMT_YUV422R	23
+#define TEGRA_DC_EXT_FMT_YCbCr422RA	24
+#define TEGRA_DC_EXT_FMT_YUV422RA	25
+
+#define TEGRA_DC_EXT_BLEND_NONE		0
+#define TEGRA_DC_EXT_BLEND_PREMULT	1
+#define TEGRA_DC_EXT_BLEND_COVERAGE	2
+
+struct tegra_dc_ext_flip_windowattr {
+	__s32	index;
+	__u32	buff_id;
+	__u32	blend;
+	__u32	offset;
+	__u32	offset_u;
+	__u32	offset_v;
+	__u32	stride;
+	__u32	stride_uv;
+	__u32	pixformat;
+	/*
+	 * x, y, w, h are fixed-point: 20 bits of integer (MSB) and 12 bits of
+	 * fractional (LSB)
+	 */
+	__u32	x;
+	__u32	y;
+	__u32	w;
+	__u32	h;
+	__u32	out_x;
+	__u32	out_y;
+	__u32	out_w;
+	__u32	out_h;
+	__u32	z;
+	__u32	swap_interval;
+	struct timespec timestamp;
+	__u32	pre_syncpt_id;
+	__u32	pre_syncpt_val;
+	/* Leave some wiggle room for future expansion */
+	__u32   pad[8];
+};
+
+#define TEGRA_DC_EXT_FLIP_N_WINDOWS	3
+
+struct tegra_dc_ext_flip {
+	struct tegra_dc_ext_flip_windowattr win[TEGRA_DC_EXT_FLIP_N_WINDOWS];
+	__u32	post_syncpt_id;
+	__u32	post_syncpt_val;
+};
+
+/*
+ * Cursor image format:
+ * - Tegra hardware supports two colors: foreground and background, specified
+ *   by the client in RGB8.
+ * - The image should be specified as two 1bpp bitmaps immediately following
+ *   each other in memory.  Each pixel in the final cursor will be constructed
+ *   from the bitmaps with the following logic:
+ *		bitmap1 bitmap0
+ *		(mask)  (color)
+ *		  1	   0	transparent
+ *		  1	   1	inverted
+ *		  0	   0	background color
+ *		  0	   1	foreground color
+ * - Exactly one of the SIZE flags must be specified.
+ */
+#define TEGRA_DC_EXT_CURSOR_IMAGE_FLAGS_SIZE_32x32	1
+#define TEGRA_DC_EXT_CURSOR_IMAGE_FLAGS_SIZE_64x64	2
+struct tegra_dc_ext_cursor_image {
+	struct {
+		__u8	r;
+		__u8	g;
+		__u8	b;
+	} foreground, background;
+	__u32	buff_id;
+	__u32	flags;
+};
+
+/* Possible flags for struct nvdc_cursor's flags field */
+#define TEGRA_DC_EXT_CURSOR_FLAGS_VISIBLE	1
+
+struct tegra_dc_ext_cursor {
+	__s16 x;
+	__s16 y;
+	__u32 flags;
+};
+
+/*
+ * Color conversion is performed as follows:
+ *
+ * r = sat(kyrgb * sat(y + yof) + kur * u + kvr * v)
+ * g = sat(kyrgb * sat(y + yof) + kug * u + kvg * v)
+ * b = sat(kyrgb * sat(y + yof) + kub * u + kvb * v)
+ *
+ * Coefficients should be specified as fixed-point values; the exact format
+ * varies for each coefficient.
+ * The format for each coefficient is listed below with the syntax:
+ * - A "s." prefix means that the coefficient has a sign bit (twos complement).
+ * - The first number is the number of bits in the integer component (not
+ *   including the optional sign bit).
+ * - The second number is the number of bits in the fractional component.
+ *
+ * All three fields should be tightly packed, justified to the LSB of the
+ * 16-bit value.  For example, the "s.2.8" value should be packed as:
+ * (MSB) 5 bits of 0, 1 bit of sign, 2 bits of integer, 8 bits of frac (LSB)
+ */
+struct tegra_dc_ext_csc {
+	__u32 win_index;
+	__u16 yof;	/* s.7.0 */
+	__u16 kyrgb;	/*   2.8 */
+	__u16 kur;	/* s.2.8 */
+	__u16 kvr;	/* s.2.8 */
+	__u16 kug;	/* s.1.8 */
+	__u16 kvg;	/* s.1.8 */
+	__u16 kub;	/* s.2.8 */
+	__u16 kvb;	/* s.2.8 */
+};
+
+
+#define TEGRA_DC_EXT_FLAGS_ENABLED	1
+struct tegra_dc_ext_status {
+	__u32 flags;
+	/* Leave some wiggle room for future expansion */
+	__u32 pad[3];
+};
+
+#define TEGRA_DC_EXT_SET_NVMAP_FD \
+	_IOW('D', 0x00, __s32)
+
+#define TEGRA_DC_EXT_GET_WINDOW \
+	_IOW('D', 0x01, __u32)
+#define TEGRA_DC_EXT_PUT_WINDOW \
+	_IOW('D', 0x02, __u32)
+
+#define TEGRA_DC_EXT_FLIP \
+	_IOWR('D', 0x03, struct tegra_dc_ext_flip)
+
+#define TEGRA_DC_EXT_GET_CURSOR \
+	_IO('D', 0x04)
+#define TEGRA_DC_EXT_PUT_CURSOR \
+	_IO('D', 0x05)
+#define TEGRA_DC_EXT_SET_CURSOR_IMAGE \
+	_IOW('D', 0x06, struct tegra_dc_ext_cursor_image)
+#define TEGRA_DC_EXT_SET_CURSOR \
+	_IOW('D', 0x07, struct tegra_dc_ext_cursor)
+
+#define TEGRA_DC_EXT_SET_CSC \
+	_IOW('D', 0x08, struct tegra_dc_ext_csc)
+
+#define TEGRA_DC_EXT_GET_STATUS \
+	_IOR('D', 0x09, struct tegra_dc_ext_status)
+
+/*
+ * Returns the auto-incrementing vblank syncpoint for the head associated with
+ * this device node
+ */
+#define TEGRA_DC_EXT_GET_VBLANK_SYNCPT \
+	_IOR('D', 0x09, __u32)
+
+
+enum tegra_dc_ext_control_output_type {
+	TEGRA_DC_EXT_DSI,
+	TEGRA_DC_EXT_LVDS,
+	TEGRA_DC_EXT_VGA,
+	TEGRA_DC_EXT_HDMI,
+	TEGRA_DC_EXT_DVI,
+};
+
+/*
+ * Get the properties for a given output.
+ *
+ * handle (in): Which output to query
+ * type (out): Describes the type of the output
+ * connected (out): Non-zero iff the output is currently connected
+ * associated_head (out): The head number that the output is currently
+ *      bound to.  -1 iff the output is not associated with any head.
+ * head_mask (out): Bitmask of which heads the output may be bound to (some
+ *      outputs are permanently bound to a single head).
+ */
+struct tegra_dc_ext_control_output_properties {
+	__u32 handle;
+	enum tegra_dc_ext_control_output_type type;
+	__u32 connected;
+	__s32 associated_head;
+	__u32 head_mask;
+};
+
+struct tegra_dc_ext_control_output_edid {
+	__u32 handle;
+	__u32 size;
+	void *data;
+};
+
+struct tegra_dc_ext_event {
+	__u32	type;
+	ssize_t	data_size;
+	char	data[0];
+};
+
+#define TEGRA_DC_EXT_EVENT_HOTPLUG	0x1
+struct tegra_dc_ext_control_event_hotplug {
+	__u32 handle;
+};
+
+#define TEGRA_DC_EXT_CONTROL_GET_NUM_OUTPUTS \
+	_IOR('C', 0x00, __u32)
+#define TEGRA_DC_EXT_CONTROL_GET_OUTPUT_PROPERTIES \
+	_IOWR('C', 0x01, struct tegra_dc_ext_control_output_properties)
+#define TEGRA_DC_EXT_CONTROL_GET_OUTPUT_EDID \
+	_IOWR('C', 0x02, struct tegra_dc_ext_control_output_edid)
+#define TEGRA_DC_EXT_CONTROL_SET_EVENT_MASK \
+	_IOW('C', 0x03, __u32)
+
+#endif /* __TEGRA_DC_EXT_H */
diff --git a/include/video/tegrafb.h b/include/video/tegrafb.h
index 6e765c5b175a..919661b1a8e0 100644
--- a/include/video/tegrafb.h
+++ b/include/video/tegrafb.h
@@ -20,79 +20,13 @@
 
 #include <linux/fb.h>
 #include <linux/types.h>
-#include <asm/ioctl.h>
-
-#define TEGRA_FB_WIN_FMT_P1		0
-#define TEGRA_FB_WIN_FMT_P2		1
-#define TEGRA_FB_WIN_FMT_P4		2
-#define TEGRA_FB_WIN_FMT_P8		3
-#define TEGRA_FB_WIN_FMT_B4G4R4A4	4
-#define TEGRA_FB_WIN_FMT_B5G5R5A	5
-#define TEGRA_FB_WIN_FMT_B5G6R5		6
-#define TEGRA_FB_WIN_FMT_AB5G5R5	7
-#define TEGRA_FB_WIN_FMT_B8G8R8A8	12
-#define TEGRA_FB_WIN_FMT_R8G8B8A8	13
-#define TEGRA_FB_WIN_FMT_B6x2G6x2R6x2A8	14
-#define TEGRA_FB_WIN_FMT_R6x2G6x2B6x2A8	15
-#define TEGRA_FB_WIN_FMT_YCbCr422	16
-#define TEGRA_FB_WIN_FMT_YUV422		17
-#define TEGRA_FB_WIN_FMT_YCbCr420P	18
-#define TEGRA_FB_WIN_FMT_YUV420P	19
-#define TEGRA_FB_WIN_FMT_YCbCr422P	20
-#define TEGRA_FB_WIN_FMT_YUV422P	21
-#define TEGRA_FB_WIN_FMT_YCbCr422R	22
-#define TEGRA_FB_WIN_FMT_YUV422R	23
-#define TEGRA_FB_WIN_FMT_YCbCr422RA	24
-#define TEGRA_FB_WIN_FMT_YUV422RA	25
-
-#define TEGRA_FB_WIN_BLEND_NONE		0
-#define TEGRA_FB_WIN_BLEND_PREMULT	1
-#define TEGRA_FB_WIN_BLEND_COVERAGE	2
-
-#define TEGRA_FB_WIN_FLAG_INVERT_H	(1 << 0)
-#define TEGRA_FB_WIN_FLAG_INVERT_V	(1 << 1)
-#define TEGRA_FB_WIN_FLAG_TILED		(1 << 2)
-
-/* set index to -1 to ignore window data */
-struct tegra_fb_windowattr {
-	__s32	index;
-	__u32	buff_id;
-	__u32	flags;
-	__u32	blend;
-	__u32	offset;
-	__u32	offset_u;
-	__u32	offset_v;
-	__u32	stride;
-	__u32	stride_uv;
-	__u32	pixformat;
-	__u32	x;
-	__u32	y;
-	__u32	w;
-	__u32	h;
-	__u32	out_x;
-	__u32	out_y;
-	__u32	out_w;
-	__u32	out_h;
-	__u32	z;
-	__u32	pre_syncpt_id;
-	__u32	pre_syncpt_val;
-};
-
-#define TEGRA_FB_FLIP_N_WINDOWS		3
-
-struct tegra_fb_flip_args {
-	struct tegra_fb_windowattr win[TEGRA_FB_FLIP_N_WINDOWS];
-	__u32 post_syncpt_id;
-	__u32 post_syncpt_val;
-};
+#include <linux/ioctl.h>
 
 struct tegra_fb_modedb {
 	struct fb_var_screeninfo *modedb;
 	__u32 modedb_len;
 };
 
-#define FBIO_TEGRA_SET_NVMAP_FD	_IOW('F', 0x40, __u32)
-#define FBIO_TEGRA_FLIP		_IOW('F', 0x41, struct tegra_fb_flip_args)
 #define FBIO_TEGRA_GET_MODEDB	_IOWR('F', 0x42, struct tegra_fb_modedb)
 
 #endif