diff options
| author | Stefan Agner <stefan@agner.ch> | 2014-09-19 23:04:28 +0200 |
|---|---|---|
| committer | Stefan Agner <stefan@agner.ch> | 2014-12-12 13:02:33 +0100 |
| commit | 571afa818c7ab872c03130ab87c0cde40c3ec321 (patch) | |
| tree | fb797afed15c03fea1e7010185202ee75b405185 /include | |
| parent | cf39c3959171b1b6d0c87f4e3b04e7a1a1072228 (diff) | |
ARM: imx: clk-gate2: allow custom gate configuration
The 2-bit gates found i.MX and Vybrid SoC support different clock
configuration:
0b00: clk disabled
0b01: clk enabled in RUN mode but disabled in WAIT and STOP mode
0b10: clk enabled in RUN, WAIT and STOP mode (only Vybrid)
0b11: clk enabled in RUN and WAIT mode
For some clocks, we might want to configure different behaviour,
e.g. a memory clock should be on even in STOP mode. Add a new
function imx_clk_gate2_cgr which allow to configure specific
gate values through the cgr_val parameter.
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/clock/vf610-clock.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/vf610-clock.h b/include/dt-bindings/clock/vf610-clock.h index 6e9f260832f5..0b1a100007ad 100644 --- a/include/dt-bindings/clock/vf610-clock.h +++ b/include/dt-bindings/clock/vf610-clock.h @@ -194,6 +194,7 @@ #define VF610_PLL7_BYPASS 181 #define VF610_CLK_SNVS 182 #define VF610_CLK_TCON0 183 -#define VF610_CLK_END 184 +#define VF610_CLK_DDRMC 184 +#define VF610_CLK_END 185 #endif /* __DT_BINDINGS_CLOCK_VF610_H */ |