diff options
| author | Liu Ying <Ying.Liu@freescale.com> | 2015-09-11 14:58:02 +0800 |
|---|---|---|
| committer | Liu Ying <Ying.Liu@freescale.com> | 2015-09-18 18:04:01 +0800 |
| commit | e64bbcd9243a17f9eba9cb3abb6f2c1939eae110 (patch) | |
| tree | 4a4c5652cd00c0698d22e0bc644d694a6aae7cb9 /include | |
| parent | d0126e42f46f6dad9ae8c6aa390b0e1bea76492e (diff) | |
MLK-11316-1 mxc IPUv3: PRE: Export a function to set PRE_CTRL register
In order to workaround the PRE SoC bug recorded by errata ERR009624, the
software cannot write the PRE_CTRL register when the PRE writes the PRE_CTRL
register automatically to set the ENABLE bit(bit0) to 1 in the PRE repeat mode.
This patch exports a function to set the PRE_CTRL register so that it could be
used by the software when the PRE automatic writing doesn't happen for sure.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/ipu-v3-pre.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/linux/ipu-v3-pre.h b/include/linux/ipu-v3-pre.h index c3fd1fccd802..44fff478da15 100644 --- a/include/linux/ipu-v3-pre.h +++ b/include/linux/ipu-v3-pre.h @@ -79,6 +79,7 @@ void ipu_pre_free(unsigned int *id); unsigned long ipu_pre_alloc_double_buffer(unsigned int id, unsigned int size); void ipu_pre_free_double_buffer(unsigned int id); int ipu_pre_config(int id, struct ipu_pre_context *config); +int ipu_pre_set_ctrl(unsigned int id, struct ipu_pre_context *config); int ipu_pre_enable(int id); void ipu_pre_disable(int id); int ipu_pre_set_fb_buffer(int id, unsigned long fb_paddr, @@ -111,6 +112,11 @@ int ipu_pre_config(int id, struct ipu_pre_context *config) return -ENODEV; } +int ipu_pre_set_ctrl(unsigned int id, struct ipu_pre_context *config) +{ + return -ENODEV; +} + int ipu_pre_enable(int id) { return -ENODEV; |