diff options
| author | Quinn Jensen <quinn.jensen@freescale.com> | 2007-10-24 21:25:35 -0600 |
|---|---|---|
| committer | Quinn Jensen <quinn.jensen@freescale.com> | 2007-10-24 21:25:35 -0600 |
| commit | ff6800822de641075a54e2ca84363708e172e282 (patch) | |
| tree | 2ad414554ea394e2bef7ce010a8ed4d0096c2490 /include | |
| parent | 4465015d95c5e6b53cd5366597e9a34610641168 (diff) | |
CR ENGR00039921 v4l2: support L1 writeback cached buffers
Patch for CR ENGR00039921 v4l2: support L1 writeback cached buffers
This patch makes MXC V4L2 output buffers L1 writeback cacheable. The L1
cache is flushed for each QBUF ioctl call if the buffer is mmapped.
Applies to linux 2.6.22 kernel on MX3 platforms.
http://www.bitshrine.org/gpp/linux-2.6.22-mx-CR-ENGR00039921-v4l2-support-L1-writeback-.patch
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-arm/pgtable.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/asm-arm/pgtable.h b/include/asm-arm/pgtable.h index e3af9215f959..feeb5486b525 100644 --- a/include/asm-arm/pgtable.h +++ b/include/asm-arm/pgtable.h @@ -298,8 +298,8 @@ PTE_BIT_FUNC(mkyoung, |= L_PTE_YOUNG); /* Extended config for non-shared device attributes */ #define pgprot_nonshareddev(prot) __pgprot(pgprot_val(prot) | L_PTE_EXTENDED) /* Extended configurations for inner writeback cacheable */ -#define pgprot_writealloc(prot) __pgprot(pgprot_val(prot) | L_PTE_EXTENDED & ~L_PTE_CACHEABLE) -#define pgprot_outer_wrthru(prot) __pgprot(pgprot_val(prot) | L_PTE_EXTENDED & ~L_PTE_BUFFERABLE) +#define pgprot_writealloc(prot) __pgprot((pgprot_val(prot) | L_PTE_EXTENDED) & ~L_PTE_CACHEABLE) +#define pgprot_outer_wrthru(prot) __pgprot((pgprot_val(prot) | L_PTE_EXTENDED) & ~L_PTE_BUFFERABLE) #define pgprot_outer_noncached(prot) __pgprot(pgprot_val(prot) | L_PTE_EXTENDED & ~(L_PTE_CACHEABLE | L_PTE_BUFFERABLE)) |