diff options
| author | Shengjiu Wang <shengjiu.wang@freescale.com> | 2014-09-29 10:56:56 +0800 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@nxp.com> | 2016-01-14 10:59:58 -0600 |
| commit | 90edebd7a9674434b7914a75d6b37b9ef6074d37 (patch) | |
| tree | 13aca397fb296466354cfedd5acf15ee6bc2e656 /include | |
| parent | 65770888946cc596cdb19998b501bb64aa5778c3 (diff) | |
MLK-9723-3: include: imx6q-iomuxc-gpr: add bit description for MQS
Add MQS's bit description in gpr header file.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit 1e576de4b46a0fadd1c8df7f08229ac759e765f5)
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h index 13bb0fb2aef8..bfe633d5dc5b 100644 --- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h +++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h @@ -411,6 +411,15 @@ #define IMX6SX_GPR4_FEC_ENET1_STOP_REQ (0x1 << 3) #define IMX6SX_GPR4_FEC_ENET2_STOP_REQ (0x1 << 4) +#define IMX6SX_GPR2_MQS_OVERSAMPLE_MASK (0x1 << 26) +#define IMX6SX_GPR2_MQS_OVERSAMPLE_SHIFT (26) +#define IMX6SX_GPR2_MQS_EN_MASK (0x1 << 25) +#define IMX6SX_GPR2_MQS_EN_SHIFT (25) +#define IMX6SX_GPR2_MQS_SW_RST_MASK (0x1 << 24) +#define IMX6SX_GPR2_MQS_SW_RST_SHIFT (24) +#define IMX6SX_GPR2_MQS_CLK_DIV_MASK (0xFF << 16) +#define IMX6SX_GPR2_MQS_CLK_DIV_SHIFT (16) + #define IMX6SX_GPR5_DISP_MUX_LDB_CTRL_MASK (0x1 << 3) #define IMX6SX_GPR5_DISP_MUX_LDB_CTRL_LCDIF1 (0x0 << 3) #define IMX6SX_GPR5_DISP_MUX_LDB_CTRL_LCDIF2 (0x1 << 3) |