diff options
| author | Thomas Gleixner <tglx@linutronix.de> | 2011-07-19 16:19:51 +0200 |
|---|---|---|
| committer | Hiroshi DOYU <hdoyu@nvidia.com> | 2012-01-23 11:11:32 +0200 |
| commit | a20bcb261d9a4decd735665551bfe63b4b9f63a2 (patch) | |
| tree | 53f1a88b4bd19cd0d41b36de57b81f348ea5f64a /include | |
| parent | 89f0314d29fa179f4bbaa2c7404cebb99646198e (diff) | |
locking, x86, iommu: Annotate iommu->register_lock as raw
The iommu->register_lock can be taken in atomic context and therefore
must not be preempted on -rt - annotate it.
In mainline this change documents the low level nature of
the lock - otherwise there's no functional difference. Lockdep
and Sparse checking will work as usual.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/intel-iommu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h index 9310c699a37d..19728c462399 100644 --- a/include/linux/intel-iommu.h +++ b/include/linux/intel-iommu.h @@ -311,7 +311,7 @@ struct intel_iommu { u64 cap; u64 ecap; u32 gcmd; /* Holds TE, EAFL. Don't need SRTP, SFL, WBF */ - spinlock_t register_lock; /* protect register handling */ + raw_spinlock_t register_lock; /* protect register handling */ int seq_id; /* sequence id of the iommu */ int agaw; /* agaw of this iommu */ int msagaw; /* max sagaw of this iommu */ |