diff options
author | Liu Ying <Ying.Liu@freescale.com> | 2015-03-03 11:14:45 +0800 |
---|---|---|
committer | Jason Liu <r64343@freescale.com> | 2015-05-08 17:22:49 +0800 |
commit | e9654a4f083c57bb00000d519df3785723e5ab39 (patch) | |
tree | 2112b33e73c9656f79797e80184d56c8fa6e8d89 /include | |
parent | 114c298d3c43bef3a106856d4ef8389bd5518b77 (diff) |
MLK-10436-02: ARM: imx: Add gate clocks for i.MX6QP PRE0/1/2/3
There are four PRE engines embedded in i.MX6Q R2.
The PRE0/1/2/3 gate clocks are derived from the gpu3d_axi clock.
This patch adds the gate clocks.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Bai Ping <b51503@freescale.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/dt-bindings/clock/imx6qdl-clock.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/imx6qdl-clock.h b/include/dt-bindings/clock/imx6qdl-clock.h index 84c5c9740f7d..e7a9ad70be63 100644 --- a/include/dt-bindings/clock/imx6qdl-clock.h +++ b/include/dt-bindings/clock/imx6qdl-clock.h @@ -261,6 +261,10 @@ #define IMX6QDL_CLK_ECSPI_SEL 252 #define IMX6QDL_CLK_CAN_SEL 253 #define IMX6QDL_CLK_MMDC_CH1_AXI_CG 254 -#define IMX6QDL_CLK_END 255 +#define IMX6QDL_CLK_PRE0 255 +#define IMX6QDL_CLK_PRE1 256 +#define IMX6QDL_CLK_PRE2 257 +#define IMX6QDL_CLK_PRE3 258 +#define IMX6QDL_CLK_END 259 #endif /* __DT_BINDINGS_CLOCK_IMX6QDL_H */ |