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authorChen Liangjun <b36089@freescale.com>2012-10-31 11:11:26 +0800
committerChen Liangjun <b36089@freescale.com>2012-11-06 13:43:41 +0800
commitf10e0cf7a83b920cede6e8fd933b66b454040a72 (patch)
tree1818f55c2135e35ae8b6ae7650a6f53455587fc4 /include
parente49af26851c3f5a899b69682189f7849da45452b (diff)
ENGR00231773-5 ASRC: use poll mode to receive last period of ASRC data
ASRC driver use DMA to transfer data from ASRC output FIFO to memory. However, DMA way require the data number in ASRC output FIFO being larger than watermark level. Thus a dma request can trigger a DMA burst. For the last period of output data, its number is possiblely less than output FIFO watermark level. In this case, the output DMA would pending for the last period of output data until timeout. In this patch: 1 divide expected output data length into 2 parts: DMA part and poll part. Using DMA to get the DMA part data and poll mode to get the poll part. 2 to prevent user from processing these 2 parts above, kernel buffers would be untouchable. User application only need send its data buffer address to driver instead of query the kernel buffer. Signed-off-by: Chen Liangjun <b36089@freescale.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/mxc_asrc.h19
1 files changed, 15 insertions, 4 deletions
diff --git a/include/linux/mxc_asrc.h b/include/linux/mxc_asrc.h
index 28137a0ce104..d1b313699477 100644
--- a/include/linux/mxc_asrc.h
+++ b/include/linux/mxc_asrc.h
@@ -27,7 +27,6 @@
#define ASRC_REQ_PAIR _IOWR(ASRC_IOC_MAGIC, 0, struct asrc_req)
#define ASRC_CONFIG_PAIR _IOWR(ASRC_IOC_MAGIC, 1, struct asrc_config)
#define ASRC_RELEASE_PAIR _IOW(ASRC_IOC_MAGIC, 2, enum asrc_pair_index)
-#define ASRC_QUERYBUF _IOWR(ASRC_IOC_MAGIC, 3, struct asrc_buffer)
#define ASRC_Q_INBUF _IOW(ASRC_IOC_MAGIC, 4, struct asrc_buffer)
#define ASRC_DQ_INBUF _IOW(ASRC_IOC_MAGIC, 5, struct asrc_buffer)
#define ASRC_Q_OUTBUF _IOW(ASRC_IOC_MAGIC, 6, struct asrc_buffer)
@@ -146,11 +145,11 @@ enum asrc_error_status {
#include <linux/scatterlist.h>
#define ASRC_DMA_BUFFER_NUM 2
-#define ASRC_INPUTFIFO_THRESHOLD 32
-#define ASRC_OUTPUTFIFO_THRESHOLD 32
+#define ASRC_INPUTFIFO_THRESHOLD 4
+#define ASRC_OUTPUTFIFO_THRESHOLD 2
#define ASRC_DMA_BUFFER_SIZE (1024 * 48 * 4)
#define ASRC_MAX_BUFFER_SIZE (1024 * 48)
-
+#define ASRC_OUTPUT_LAST_SAMPLE 8
#define ASRC_ASRCTR_REG 0x00
@@ -196,6 +195,15 @@ enum asrc_error_status {
#define ASRC_ASRMCR1C_REG 0xC8
+#define ASRC_ASRFSTX_INPUT_FIFO_WIDTH 7
+#define ASRC_ASRFSTX_INPUT_FIFO_OFFSET 0
+#define ASRC_ASRFSTX_INPUT_FIFO_MASK 0x7F
+
+#define ASRC_ASRFSTX_OUTPUT_FIFO_WIDTH 7
+#define ASRC_ASRFSTX_OUTPUT_FIFO_OFFSET 12
+#define ASRC_ASRFSTX_OUTPUT_FIFO_MASK (0x7F << ASRC_ASRFSTX_OUTPUT_FIFO_OFFSET)
+
+
struct dma_block {
unsigned int index;
unsigned int length;
@@ -227,6 +235,7 @@ struct asrc_pair_params {
struct dma_block input_dma[ASRC_DMA_BUFFER_NUM];
struct dma_block output_dma_total;
struct dma_block output_dma[ASRC_DMA_BUFFER_NUM];
+ struct dma_block output_last_period;
struct dma_async_tx_descriptor *desc_in;
struct dma_async_tx_descriptor *desc_out;
struct work_struct task_output_work;
@@ -235,6 +244,8 @@ struct asrc_pair_params {
struct scatterlist input_sg[4], output_sg[4];
enum asrc_word_width input_word_width;
enum asrc_word_width output_word_width;
+ u32 input_sample_rate;
+ u32 output_sample_rate;
};
struct asrc_data {