diff options
| author | Shengjiu Wang <shengjiu.wang@freescale.com> | 2015-01-27 16:24:53 +0800 |
|---|---|---|
| committer | Shengjiu Wang <shengjiu.wang@freescale.com> | 2015-01-28 15:44:35 +0800 |
| commit | d467cd78be24dc9c18bb3d0bb481fe5cf77e4c83 (patch) | |
| tree | 99c2bd213004efda5218e21cf47785f2e7a6de3a /include | |
| parent | 36e802e9dbf639bebe6413f38623339cb40ed304 (diff) | |
MLK-10161-1: ARM: imx6q: Add SPDIF_GCLK clock in clock tree
As spdif driver will register SPDIF clock to regmap, regmap will do
clk_prepare in init function, so SPDIF clock is prepared in probe, then its
root clock (pll clock) is prepared also, which cause the arm can't enter
low power mode.
Add SPDIF_GCLK in clock tree which share same gate bits with SPDIF clock.
Its root clock is ipg clock, and register it to regmap, then the issue can be
fixed.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/clock/imx6qdl-clock.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/imx6qdl-clock.h b/include/dt-bindings/clock/imx6qdl-clock.h index 64855469729e..4bd9d6e7b59d 100644 --- a/include/dt-bindings/clock/imx6qdl-clock.h +++ b/include/dt-bindings/clock/imx6qdl-clock.h @@ -255,6 +255,7 @@ #define IMX6QDL_CAAM_MEM 246 #define IMX6QDL_CAAM_ACLK 247 #define IMX6QDL_CAAM_IPG 248 -#define IMX6QDL_CLK_END 249 +#define IMX6QDL_CLK_SPDIF_GCLK 249 +#define IMX6QDL_CLK_END 250 #endif /* __DT_BINDINGS_CLOCK_IMX6QDL_H */ |